Accurately describing vertical stacking isn’t just a simple intellectual exercise. It’s a serious industry issue.
Talking about stacked die is sort of like describing Africa as a country. First of all, it’s wrong—despite some politicians’ statements to the contrary. And second, lumping everything together under a single heading probably adds more confusion than clarity.
There are several ways to approach this semantics problem. One is by function. Memory on memory, memory on logic, and logic on logic are meaningful ways of looking at stacked die. Each says something different about how chips are being organized, and each gives an indication of the problem being solved and potential issues that may arise. In the first two the challenges will be focused mostly on bandwidth and accessibility. In logic-on-logic implementations the technical challenges will largely be relegated to physical effects such as heat dissipation, expansion coefficients and signal integrity.
A second tack is to break it down by packaging approaches, and there are a bunch of these. System-in-package and multichip module are different from a 2.5D stack using an interposer. But when you consider Xilinx’s four-tile 2D structure connected by an interposer, is that a horizontal stack? And what exactly is real 3D? Is it simply adding through-silicon vias, or does it require logic on logic?
A third way of looking at this is from the standpoint of markets while ignoring the underlying architecture. Is it a MEMS chip, a logic chip, cell phone SoC? And what happens when you ignore the changes that will be forced upon many parts of the ecosystem by combining various functions in different layers.
The problem, of course, is that none of these lines will remain clear. Combinations of technology—a 3D memory on top of a 2.5D logic chip, for example—eliminates any chance of a clear-cut description about exactly what is being designed. Adding more functionality into chips makes it hard to describe what exactly they do. And mixing older generations of technology with newer ones will even make it hard to describe whether a chip is new, old, or somewhere in between.
But this needs to be viewed as more than just an idle intellectual exercise. Companies have come and gone because they couldn’t easily describe their technology, despite the fact that it was unique and valuable to potential customers. Stacking die is a big step forward technically, but there also needs to be clarity in how to describe the various stacking approaches. Without it, we may create one of the worst marketing nightmares the semiconductor industry has ever seen.
–Ed Sperling
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