The Linley Group looks at the No. 2 processor IP by volume and why the number of shipments is growing each year.
Synopsys is a leading EDA company with an extensive portfolio of licensable DesignWare intellectual property (IP). The portfolio includes interface IP, analog IP, embedded memories, and logic libraries. Although most chip designers know that DesignWare IP also includes licensable CPU cores and subsystems, many are surprised to learn that Synopsys is second only to ARM in the number of chips that use its cores. Synopsys currently ships about 1.3 billion ARC cores per year, and those shipments are growing by about 300 million units per year. Many customer designs integrate multiple ARC cores per chip.
Announced in November 2013 with immediate availability, the new ARC HS family increases performance, delivers real-time response, and improves the development experience for both hardware and software engineers. It provides superlative clock-frequency headroom for current and future chip designs. Notably, it achieves these goals while preserving the exceptional code density, power efficiency, compactness, configurability, and extensibility that have long been hallmarks of the ARC processor architecture.
This white paper describes the Synopsys DesignWare® ARC® HS (High Speed) processor family. ARC HS34 and HS36 are the first members of the company’s newest family of licensable CPU cores for embedded applications that need 32-bit RISC performance in a small silicon footprint with minimal power consumption. The Linley Group prepared this report after evaluating ARC HS performance data and technical features. This paper is sponsored by Synopsys, but the opinions and analysis are those of the authors.
To view this white paper, click here.
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