System Bits: June 24

Electrical engineers from MIT have demonstrated a 36-core chip with an interconnect fabric; a flexible and energy-efficient hybrid circuit using carbon nanotubes has big implications for the future of electronics, USC Viterbi engineers say.

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Experimental 36-core chip
The more cores — or processing units — a computer chip has, the bigger the problem of communication between cores becomes. For years, Li-Shiuan Peh, the Singapore Research Professor of Electrical Engineering and Computer Science at MIT, has argued that the massively multicore chips of the future will need to resemble little Internets, where each core has an associated router, and data travels between cores in packets of fixed size.

This week, Peh’s group unveiled a 36-core chip that features just such a “network-on-chip.” In addition to implementing many of the group’s earlier ideas, it also solves one of the problems that has bedeviled previous attempts to design networks-on-chip: maintaining cache coherence, or ensuring that cores’ locally stored copies of globally accessible data remain up to date.

The MIT researchers' new 36-core chip is "tiled," meaning that it simply repeats the same circuit layout 36 times. Tiling makes multicore chips much easier to design. (Source: MIT)

The MIT researchers’ new 36-core chip is “tiled,” meaning that it simply repeats the same circuit layout 36 times. Tiling makes multicore chips much easier to design. (Source: MIT)

Hybrid CNT circuit
When it comes to electronics, silicon will now have to share the spotlight as researchers from the USC Viterbi School of Engineering report they have overcome a major issue in carbon nanotube technology by developing a flexible, energy-efficient hybrid circuit combining carbon nanotube thin film transistors with other thin film transistors.

This hybrid could take the place of silicon as the traditional transistor material used in electronic chips, since carbon nanotubes are more transparent, flexible, and can be processed at a lower cost.

Electrical engineering professor Dr. Chongwu Zhou and USC Viterbi graduate students Haitian Chen, Yu Cao, and Jialu Zhang developed this energy-efficient circuit by integrating carbon nanotube (CNT) thin film transistors (TFT) with thin film transistors comprised of indium, gallium and zinc oxide (IGZO).

Hybrid CNT/IGZO circuits fabricated on a polyimide film laminated on a polydimethylsiloxane (PDMS) substrate (Source: USC Viterbi)

Hybrid CNT/IGZO circuits fabricated on a polyimide film laminated on a polydimethylsiloxane (PDMS) substrate (Source: USC Viterbi)

Carbon nanotubes are so small that they can only be viewed through a scanning electron microscope. This hybridization of carbon nanotube thin films and IGZO thin films was achieved by combining their types, p-type and n-type, respectively, to create circuits that can operate complimentarily, reducing power loss and increasing efficiency. The inclusion of IGZO thin film transistors was necessary to provide power efficiency to increase battery life. If only carbon nanotubes had been used, then the circuits would not be power-efficient. By combining the two materials, their strengths have been joined and their weaknesses hidden.

The potential applications for this kind of integrated circuitry are numerous, including Organic Light Emitting Diodes (OLEDs), digital circuits, radio frequency identification (RFID) tags, sensors, wearable electronics, and flash memory devices. Even heads-up displays on vehicle dashboards could soon be a reality.

The new technology also has major medical implications. Currently, memory used in computers and phones is made with silicon substrates, the surface on which memory chips are built. To obtain medical information from a patient such as heart rate or brainwave data, stiff electrode objects are placed on several fixed locations on the patient’s body. With this new hybridized circuit, however, electrodes could be placed all over the patient’s body with just a single large but flexible object.