Application Driven Network On Chip Architecture Exploration And Refinement For A Complex SoC


This white paper summarizes the various features a NoC is required to implement to be integrated in modern SoCs, describes a top-down approach based on the progressive refinement of the NoC description from its functional specification (Sect. 4) to its verification (Sect. 8), and it uses use cases to show how to identify bottlenecks and converge towards the NoC implementation. To read more, ... » read more

5G Design Changes


Mike Fitton, senior director of strategic planning at Achronix, talks with Semiconductor Engineering about the two distinct parts of 5G deployment, how to get a huge amount of data from the core to the edge of a device where it is usable, and how a network on chip can improve the flow of data. » read more

Speeding Up AI


Robert Blake, president and CEO of Achronix, sat down with Semiconductor Engineering to talk about AI, which processors work best where, and different approaches to accelerate performance. SE: How is AI affecting the FPGA business, given the constant changes in algorithms and the proliferation of AI almost everywhere? Blake: As we talk to more and more customers deploying new products and... » read more

How To Integrate An Embedded FPGA


Choosing to add programmable logic into an SoC with an eFPGA is just the beginning. Other choices follow involving how many lookup tables (LUTs), how much routing and what topology, how will data be transferred in and out of the fabric, does data need to be coherent with system memory, how will it be programmed and tested, and what RTL functions need to be embedded into the programmable fabric ... » read more

The Race To Multi-Domain SoCs


K. Charles Janac, president and CEO of Arteris IP, sat down with Semiconductor Engineering to discuss the impact of automotive and AI on chip design. What follows are excerpts of that conversation. SE: What do you see as the biggest changes over the next 12 to 24 months? Janac: There are segments of the semiconductor market that are shrinking, such as DTV and simple IoT. Others are going ... » read more

AI Chips: NoC Interconnect IP Solves Three Design Challenges


New network-on-chip (NoC) interconnect IP is now available for artificial intelligence (AI) systems-on-chip (SoC). Arteris IP launched the fourth generation of the FlexNoC interconnect IP with a new optional AI package. The novel NoC interconnect technologies solves many data flow problems in today’s AI designs. Innovative features address the requirements of the next-generation of AI chips t... » read more

Adding NoCs To FPGA SoCs


FPGA SoCs straddle the line between flexibility and performance by combining elements of both FPGAs and ASICs. But as they find a home in more safety- and mission-critical markets, they also are facing some of the same issues as standard SoCs, including the ability to move larger and larger amounts of data quickly throughout an increasingly complex device, and the difficulty in verifying and de... » read more

Avoiding Traffic Jams In SoC Design


While sitting in a traffic jam on the way to work, I realized that the sheer volume of vehicles on the road exceeds the capacity originally planned for by civil engineers, when highways first hit the drawing boards 50 or 60 years ago. It dawned on me that there is a parallel to today’s System-on-Chip design—engineers are struggling to close timing on the interconnect during the back-end pla... » read more

OSDN – On-chip Software Defined Network


You must be mumbling to yourself, “Oh no, not another NoC article! The term NoC is used so loosely in the industry and everybody seem to be claiming they have one, so what more is there to say?” Fair enough, but please indulge me. Actually, there are some wannabe NoCs out there, but very few actually provide a full-fledged network. I submit, a real NoC should implement all the same key d... » read more

Executive Insight: Sundari Mitra


Sundari Mitra, co-founder and CEO of [getentity id="22535" e_name="NetSpeed Systems"], sat down with Semiconductor Engineering to discuss machine learning, shifting from a processor-centric to a memory-centric design, and what needs to change to make that all happen. What follows are excerpts of that conversation. SE: What is the biggest change you’re seeing? Mitra: We go through a cycl... » read more

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