An Automotive Value Chain In Flux


When companies view suppliers from inside their specialized niches, it is tempting to imagine the business world will continue as-is, with just minimal improvements each year. But in the automotive value chain, this no longer holds. The rapid pace of innovation around intelligent systems in cars is disrupting the business flow. Back in simpler times, semiconductor companies would work with Tier... » read more

Different Levels Of Interconnects


The interconnect hierarchy from metal 0 in a semiconductor all the way up to racks of servers. Kurt Shuler, vice president of marketing at Arteris IP, explains why each one is different, and how every level can contribute to latency and performance. » read more

Building Your Own NoC And The Hazards Of (Not) Changing


There is a perennial challenge that all R&D organizations face – how much of what we develop is essential to our competitive advantage and how much can be acquired at lower cost and risk rather than built from scratch? It’s easy to believe in the heat of battle that everything we are doing must be crucial. But the world continues to change around us. What was optional yesterday may be e... » read more

Last-Level Cache


Kurt Shuler, vice president of marketing at Arteris IP, explains how to reduce latency and improve performance with last-level cache in order to avoid sending large amounts of data to external memory, and how to ensure quality of service on a chip by taking into account contention for resources. » read more

CXL Vs. CCIX


Kurt Shuler, vice president of marketing at ArterisIP, explains how these two standards differ, which one works best where, and what each was designed for. » read more

Power Dissipation Of The Network-On-Chip In A System-on-Chip For MPEG-4 Video Encoding


An oldie but a goodie: Explains power benefits of NoC technology by characterizing a multi-processor system-on-chip (MPSoC) for MPEG4, AVC/H.264 encoding. Explains NoC power model used to analyze power consumption and dissipation. Includes: Description of multi-processor system-on-chip (MPSoC) for Multi-Processor System-on-Chip (MPSoC) for MPEG4, AVC/H.264 encoding Explanation of N... » read more

Application Driven Network On Chip Architecture Exploration And Refinement For A Complex SoC


This white paper summarizes the various features a NoC is required to implement to be integrated in modern SoCs, describes a top-down approach based on the progressive refinement of the NoC description from its functional specification (Sect. 4) to its verification (Sect. 8), and it uses use cases to show how to identify bottlenecks and converge towards the NoC implementation. To read more, ... » read more

5G Design Changes


Mike Fitton, senior director of strategic planning at Achronix, talks with Semiconductor Engineering about the two distinct parts of 5G deployment, how to get a huge amount of data from the core to the edge of a device where it is usable, and how a network on chip can improve the flow of data. » read more

Speeding Up AI


Robert Blake, president and CEO of Achronix, sat down with Semiconductor Engineering to talk about AI, which processors work best where, and different approaches to accelerate performance. SE: How is AI affecting the FPGA business, given the constant changes in algorithms and the proliferation of AI almost everywhere? Blake: As we talk to more and more customers deploying new products and... » read more

How To Integrate An Embedded FPGA


Choosing to add programmable logic into an SoC with an eFPGA is just the beginning. Other choices follow involving how many lookup tables (LUTs), how much routing and what topology, how will data be transferred in and out of the fabric, does data need to be coherent with system memory, how will it be programmed and tested, and what RTL functions need to be embedded into the programmable fabric ... » read more

← Older posts