A Memory Device With MoS2 Channel For High-Density 3D NAND Flash-Based In-Memory Computing


A technical paper titled “Low-Power Charge Trap Flash Memory with MoS2 Channel for High-Density In-Memory Computing" was published by researchers at Kyungpook National University, Sungkyunkwan University, Dankook University, and Kwangwoon University. Abstract: "With the rise of on-device artificial intelligence (AI) technology, the demand for in-memory computing has surged for data-intensiv... » read more

Improving The Retention Characteristics Of 3D NAND Flash Memories


A technical paper titled “3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer” was published by researchers at Myongji University, Soongsil University, and Seoul National University. Abstract: "To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeat... » read more