Blog Review: July 10

By Jesse Allen - 10 Jul, 2024 - Comments: 0

Cadence's Paul Graykowski suggests using real number modeling to streamline digital mixed-signal verification using logic simulators and hardware emulators. Siemens' John McMillan and Microsoft's Amit Kumar introduce the basics of 3D-IC, describe the flow and data management challenges, look at the evolution of TSMC 3DBlox 1.0 and 2.0, and detail a physical verification and reliability analy... » read more

Chip Industry Week In Review

By The SE Staff - 28 Jun, 2024 - Comments: 0

The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes. ... » read more

Blog Review: June 26

By Jesse Allen - 26 Jun, 2024 - Comments: 0

Cadence's Neelabh Singh examines the Gen4 link recovery mechanism in USB4 Version 2.0, an autonomous process that is initiated by a router when it encounters uncorrectable error events, and identified verification challenges. Synopsys' Gary Ruggles and Priyank Shukla highlight improvements to PCIe 7.0 that will enable secure data transfers and boost bandwidth for the next generation of AI an... » read more

Moving Software-Defined Vehicles Forward

By Ann Mutschler - 26 Jun, 2024 - Comments: 0

Experts at the Table: The automotive ecosystem is undergoing a transformation toward software-defined vehicles, spurring new architectures with more software. Semiconductor Engineering sat down to discuss the impact of these changes with Suraj Gajendra, vice president of products and solutions in Arm's automotive line of business; Chuck Alpert, R&D automotive fellow at Cadence; Steve Spadon... » read more

Blog Review: June 19

By Jesse Allen - 19 Jun, 2024 - Comments: 0

Siemens' John McMillan and Todd Burkholder suggest using an automatic formal-based approach to verifying chiplet package connections early in the design process. Cadence's Veena Parthan explores the intricacies of wind tunnel testing in automotive design and how the collaborative relationship between computational fluid dynamics (CFD) and wind tunnels has resulted in accelerated and more nua... » read more

IC Industry’s Growing Role In Sustainability

By Ann Mutschler - 17 Jun, 2024 - Comments: 1

The massive power needs of AI systems are putting a spotlight on sustainability in the semiconductor ecosystem. The chip industry needs to be able to produce more efficient and lower-power semiconductors. But demands for increased processing speed are rising with the widespread use of large language models and the overall increase in the amount of data that needs to be processed. Gartner estima... » read more

Understanding Scandump: A Key Silicon Debugging Technique

By Vincent Yang - 13 Jun, 2024 - Comments: 0

Scandump is an advanced silicon debugging technique that ingeniously repurposes DFT (Design For Testability) scan chains for functional debugging. This method allows for the extraction of states from registers or latches that are stitched into the scan chains, providing critical diagnostic insights. Scandump is particularly invaluable when the CPU is deadlocked or when the system hardware bec... » read more

When To Expect Domain-Specific AI Chips

By Brian Bailey - 13 Jun, 2024 - Comments: 0

The chip industry is moving toward domain-specific computation, while artificial intelligence (AI) is moving in the opposite direction, creating a gap that could force significant changes in how chips and systems are architected in the future. Behind this split is the amount of time it takes to design hardware and software. In the 18 months since ChatGPT was launched on the world, there has ... » read more

Big Shift: Creating Automotive SW Without HW

By Ann Mutschler - 12 Jun, 2024 - Comments: 1

Blog Review: June 12

By Jesse Allen - 12 Jun, 2024 - Comments: 0

Cadence's Deep Mehta finds that PCIe 6.0 switches need advanced verification strategies that delve deeper than basic functionality, such as generating backpressure traffic to identify potential performance bottlenecks and ensure the switch operates optimally in real-world scenarios. Siemens' Reetika explains why proper management and verification of reset domain crossing (RDC) paths are cruc... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.