DNS, LES, Or RANS Simulation For Your Next Automotive Design

By Veena Parthan - 04 Apr, 2024 - Comments: 0

The automotive industry is constantly advancing, with new innovations and developments emerging almost every day. The industry is committed to creating a more sustainable future with the growing trend towards electric-powered vehicles and mass production. In 2022, the global production of motor vehicles increased by 5.7%, producing 85.4 million vehicles. However, the industry faces the challe... » read more

Blog Review: Apr. 3

By Jesse Allen - 03 Apr, 2024 - Comments: 0

Siemens' Keith Felton finds that high bandwidth memory integration poses significant challenges for package designers stemming from its unique architecture and stringent performance requirements. Synopsys' Gervais Fong finds out what's new in the USB4 v2 specification, some of its unique challenges involved in doubling the performance capabilities of the USB wired connection, and an intrigui... » read more

What’s At Stake In System Design?

By Cadence - 03 Apr, 2024 - Comments: 0

When engineers refer to system analysis, they are referring to tool functions for improving an overall electronics design. What you will gain from this eBook: Power and Signal Integrity Insights into harmonic balancing and crosstalk analysis Learning about loop gain and transmission rates Examining the necessity of power-aware systems Electromagnetic Analysis Knowledge ... » read more

The Challenges Of Working With Photonics

By Karen Heyman - 01 Apr, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about where photonics is most useful — and most vulnerable — with James Pond, fellow at Ansys; Gilles Lamant, distinguished engineer at Cadence; and Mitch Heins, business development manager for photonic solutions at Synopsys. What follows are excerpts of that conversation. To view part one of this discussion, click here. ... » read more

What’s Missing In 2.5D EDA Tools

By Brian Bailey - 28 Mar, 2024 - Comments: 0

Gaps in EDA tool chains for 2.5D designs are limiting the adoption of this advanced packaging approach, which so far has been largely confined to high-performance computing. But as the rest of the chip industry begins migrating toward advanced packaging and chiplets, the EDA industry is starting to change direction. There are learning periods with all new technologies, and 2.5D advanced pack... » read more

Interconnects Essential To Heterogeneous Integration

By Karen Heyman - 28 Mar, 2024 - Comments: 0

Designing and manufacturing interconnects is becoming more complex, and more critical to device reliability, as the chip industry shifts from monolithic planar dies to collections of chips and chiplets in a package. What was once as simple as laying down a copper trace has evolved into tens of thousands of microbumps, hybrid bonds, through-silicon vias (TSVs), and even junctions for optical ... » read more

Engineers Or Their Tools: Which Is Responsible For Finding Bugs?

By Ann Mutschler and Adam Kovac - 28 Mar, 2024 - Comments: 0

Experts at the table: Finding and eliminating bugs at the source can be painstaking work, but it can prevent bigger problems later in the design flow, when they are more difficult and expensive to fix. Semiconductor Engineering sat down to discuss these issues with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software... » read more

Jumpstarting The Automotive Chiplet Ecosystem

By Steve Brown - 28 Mar, 2024 - Comments: 0

The automotive industry stands on the cusp of a technological renaissance, ushering in an era where vehicles aren't just tools of transportation, but interconnected nodes within a vast network of software-defined mobility. Central to this transformation is the concept of chiplets—miniaturized, modular components that can be mixed, matched, and scaled to create powerful, application-specific i... » read more

Cadence Cerebrus In SaaS And Imagination Technologies Case Study

By Cadence - 27 Mar, 2024 - Comments: 0

Artificial Intelligence (AI) has made noteworthy progress and is now ready and available for electronic design automation. The Cadence Cerebrus Intelligent Chip Explorer utilizes AI—specifically, reinforcement machine learning (ML) technology—combined with the industry-leading Cadence digital full flow to deliver better power, performance, and area (PPA) more quickly. However, this highl... » read more

Blog Review: Mar. 27

By Jesse Allen - 27 Mar, 2024 - Comments: 0

Cadence's Steve Brown suggests that multi-die technologies will be a key part of the path toward a faster, more efficient chip ecosystem that can support the compressed development cycles now emerging in the automotive industry. Synopsys' John Swanson, Madhumita Sanyal, and Priyank Shukla point to the role of simulation in ensuring seamless operation in the Ethernet ecosystem though rigorous... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.