tag: Cadence

Bird’s Eye View on Tensilica Vision DSPs
By Cadence - 05 Sep, 2024 - Comments: 0

The increasing use of cameras in automotive advanced driver assistance systems (ADAS) has resulted in a greater demand for the capability and performance of vision applications. This demand requires sophisticated vision processing algorithms and powerful digital signal processors (DSPs) to run them. Because of the limited power and cost budgets of these embedded systems, it is important t... » read more

Blog Review: Sept. 4
By Jesse Allen - 04 Sep, 2024 - Comments: 0

Synopsys' Jyotika Athavale and Randy Fish sit down with Google's Rama Govindaraju and Microsoft's Robert S. Chappell to discuss silent data corruption and why a solution will require chip designers and manufacturers, software and hardware engineers, vendors, and anyone involved in computer data to collaborate and take the issue seriously. Siemens' Karen Chow and Joel Mercier explain the rela... » read more

GDDR7: The Ideal Memory Solution In AI Inference
By Frank Ferro - 29 Aug, 2024 - Comments: 1

The generative AI market is experiencing rapid growth, driven by the increasing parameter size of Large Language Models (LLMs). This growth is pushing the boundaries of performance requirements for training hardware within data centers. For an in-depth look at this, consider the insights provided in "HBM3E: All About Bandwidth". Once trained, these models are deployed across a diverse range of... » read more

Blog Review: Aug. 28
By Jesse Allen - 28 Aug, 2024 - Comments: 0

Synopsys' Jon Ames checks out how the Ultra Ethernet Consortium aims to revolutionize networking by optimizing Ethernet for the rapidly evolving AI and HPC workloads by addressing critical issues like tail latency that are encountered by machine learning algorithms in large compute clusters. Cadence's Kos Gitchev introduces the DDR5 Multiplexed Rank DIMM (MRDIMM), a memory module technology ... » read more

As EDA Processes Becomes More Secure, So Do Chips
By Adam Kovac - 26 Aug, 2024 - Comments: 0

Security is becoming a much bigger concern within chips and electronic systems, but the actual implementation remains something of an afterthought, which limits its effectiveness. There are many pieces to the security puzzle on the chip design side that go well beyond just securing the hardware or the IP. The EDA tools themselves need to be secure, as well, and so does the user data within t... » read more

Chip Industry Week In Review
By The SE Staff - 23 Aug, 2024 - Comments: 0

Chinese firms imported almost $26 billion worth of chipmaking machinery, according to fresh trade data released by China’s General Administration of Customs this week, Bloomberg reports. Meanwhile, the global semiconductor manufacturing industry continued to show signs of improvement in Q2 2024 with significant growth of IC sales, stabilizing capital expenditure, and an increase in install... » read more

Next-Gen High-Speed Communication In Data Centers
By Ed Sperling - 21 Aug, 2024 - Comments: 0

Data centers are being flooded with data. While more of it needs to be processed locally, much of it also needs to be moved around within a system and between systems. This has put a spotlight on a variety of new optical technologies and methodologies. Yang Zhang, senior product marketing manager at Cadence, talks about the rapid increase in different types of optics and optical scenarios being... » read more

Blog Review: Aug. 21
By Jesse Allen - 21 Aug, 2024 - Comments: 0

Cadence's Reela Samuel explores the critical role of PCIe 6.0 equalization in maintaining signal integrity and solutions to mitigate verification challenges, such as creating checkers to verify all symbols of TS0, ensuring the correct functioning of scrambling, and monitoring phase and LTSSM state transitions. Siemens' John McMillan introduces an advanced packaging flow for Intel's Embedded ... » read more

Blog Review: Aug. 14
By Jesse Allen - 14 Aug, 2024 - Comments: 0

Cadence's Dimitry Pavlovsky highlights two new features in the AMBA CHI protocol Issue G update that enhance security of the Arm architecture: Memory Encryption Contexts, which allows data in each Realm in the memory to be encrypted with a different encryption key, and Device Assignment, which introduces hardware provisions to support fully coherent caches in partially trusted remote coherent d... » read more

Reusable Power Models
By Brian Bailey - 14 Aug, 2024 - Comments: 0

Power is not a new concern, and proprietary models are available for some tasks, but the industry lacks standardization. The Silicon Integration Initiative (Si2) is hoping to help resolve that with an upcoming release of IEEE 2416, based on its Unified Power Model (UPM) work. The creation of any model is not to be taken lightly. There is a cost to its creation, verification and maintenance. ... » read more

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