Change Is Tough


When I was actively involved in the creation of standards for the EDA and semiconductor industry, it was often joked that the great thing about standards is that there are plenty to choose from. According to the Internet, this quote can either be attributed to Grace Murray Hopper (an incredible pioneer in the development of modern programming languages and a rear admiral in the Navy), or Andrew... » read more

AI Is Rewriting The IP Playbook


Key Takeaways:  AI is reshaping the entire IP lifecycle, from creation and verification to discovery, licensing, and support.  Fast-changing AI models are making flexible IP, robust toolchains, and faster deployment essential.  Human expertise remains critical for reviewing, validating, and governing AI-assisted IP development.  AI is becoming part of the everyday work o... » read more

Unifying Software And Semiconductor Development


In this white paper, we will discuss the emerging trend in which hardware is increasingly designed to meet the end functionality of today’s systems, which is largely defined in software. This emerging software-defined era of electronic system design requires new methodologies in which the IC and PCB design is performed in concert with software design. In this paper, we will also look closely ... » read more

Realizing The Future Of 3D-IC Design


The integration of heterogeneous chiplet technology has fundamentally transformed semiconductor design, enabling the efficient creation of sophisticated system-in-packages by assembling pre-designed or third-party IP onto high-performance interposers and advanced packages. This approach offers significant advantages over traditional monolithic designs, including enhanced performance, improved p... » read more

Delivering Automotive-Grade Quality With Customized FinFET Foundation IP


By Andrew Appleby, Daryl Seitzer, and Nafiz Ahmed The growing compute demands of modern vehicles are forcing chipmakers to venture into new territory. To deliver increased processor performance for engine and body control systems, one leading semiconductor supplier knew it had to move to an automotive-qualified FinFET technology process — a leap that would introduce significant new desi... » read more

Hardware From Specifications Using AI


There is a lot of excitement these days surrounding the idea that AI could make it possible to go from a specification to a design with absolutely no hardware skills. Well, get in line, because this is the umpteenth potential technology that was going to make that possible. Don't get me wrong, it just might do it, but will this be an implementation that is reliable, have decent performance, ... » read more

EDA And IP Numbers Up Again, But Numbers Are More Nuanced


EDA and Semiconductor IP revenue grew 10.3% in Q4 2025 to $5.466 billion, up from $4.955 billion in the same period in 2024, continuing the double-digit run for the tools and IP business that has been underway for the past few years. CAE, the largest EDA category, rose 9.4% to $2.083 billion in Q4, versus $1.761 billion in Q4 2024. Non-reporting IP companies — a segment dominated by Arm �... » read more

IP Requirements Evolve For 3D Multi-Die Designs


As Moore’s Law continues to slow and demand for compute density and bandwidth accelerates, the semiconductor industry is rapidly shifting from monolithic SoCs to 3D multi-die designs. While 2.5D integration has extended system scaling, it is no longer sufficient to meet the bandwidth, latency, and power requirements of AI, HPC, and advanced automotive applications. The move to true 3D multi-d... » read more

Customizing Foundation IP For Ultra-Low-Voltage Designs


By Daryl Seitzer, Andrew Appleby, and Mohammad Tanveer Building a new system-on-chip (SoC) starts with assembling the right foundational elements—pre‑verified IP for logic, memory, I/O, and other essential functions. Standard IP solutions typically address most common design needs, but some projects call for more specialized approaches, especially when innovation is critical or when t... » read more

Accelerate Your IP Selection With Smart Solido Library Profiler


This white paper discusses the IP selection process, its requirements, challenges, and proposed solutions. The process of choosing cell IP libraries for integrated circuit (IC) design is a slow and complicated process due to the inconsistencies and complexities of library files, particularly across sources, technology nodes, and variants. Manual methods to achieve IP selection not only consumes... » read more

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