Memory Access In AI Systems

By Ed Sperling - 27 Jul, 2020 - Comments: 0

Memory access is a key consideration in AI system design. Ron Lowman, strategic marketing manager for IP at Synopsys, talks about how memory affects overall power consumption, why partitioning of on-chip and off-chip is so critical to performance and power, and how this changes from the cloud to the edge. » read more

eFPGAs Vs. FPGA Chiplets

By Ed Sperling - 22 Jul, 2020 - Comments: 0

Embedded FPGAs are a totally different concept from discrete FPGA chiplets, and that is reflected in size, cost, power and performance. Geoff Tate, CEO of Flex Logix, talks about which applications are best for each, how each maximizes power and performance, and why choices will vary greatly by application. Related eFPGA Knowledge Center FPGA Knowledge Center Increasing EFPGA Densit... » read more

Configuring Processors In The Field

By Brian Bailey - 08 Jun, 2020 - Comments: 0

The convergence of two technologies, extensible processors and embedded FPGAs, is enabling the creation of processors that can be dynamically configured in the field. But it's not clear if there is a need for them or how difficult would it be to program them. This remains an open question even though there is evidence of its usefulness in the past and new products are expected to reach the mark... » read more

Implementing Strong Security For AI/ML Accelerators

By Paul Karazuba - 05 Mar, 2020 - Comments: 0

A number of critical security vulnerabilities affecting high-performance CPUs identified in recent years have rocked the semiconductor industry. These high-profile vulnerabilities inadvertently allowed malicious programs to access sensitive data such as passwords, secret keys and other secure assets. The real-world risks of silicon complexity The above-mentioned vulnerabilities are primaril... » read more

Understanding SLAM (Simultaneous Localization And Mapping)

By Ed Sperling - 19 Feb, 2020 - Comments: 0

Amol Borkar, senior product manager for AI and computer vision at Cadence, talks with Semiconductor Engineering about mapping and tracking the movement of an object in a scene, how to identify key corners in a frame, how probabilities of accuracy fit into the picture, how noise can affect that, and how to improve the performance and reduce power in these systems. » read more

Simultaneous Localization And Mapping

By Ed Sperling - 06 Nov, 2019 - Comments: 0

Amol Borkar, senior product manager at Cadence, explains how to track the movement of an object in a scene and how to match features from one image to the next using SLAM. The technology is used in everything from mobile phones to automotive and drones. » read more

Bolstering Security For AI Applications

By Neeraj Paliwal - 14 Oct, 2019 - Comments: 0

Hardware accelerators that run sophisticated artificial intelligence (AI) and machine learning (ML) algorithms have become increasingly prevalent in data centers and endpoint devices. As such, protecting sensitive and lucrative data running on AI hardware from a range of threats is now a priority for many companies. Indeed, a determined attacker can either manipulate or steal training data, inf... » read more

Memory Subsystems In Edge Inferencing Chips

By Ed Sperling - 23 Sep, 2019 - Comments: 0

Geoff Tate, CEO of Flex Logix, talks about key issues in a memory subsystem in an inferencing chip, how factors like heat can affect performance, and where these kinds of chips will be used. » read more

The New CXL Standard

By Ed Sperling - 16 Sep, 2019 - Comments: 0

Gary Ruggles, senior staff product marketing manager at Synopsys, digs into the new Compute Express Link standard, why it’s important for high bandwidth in AI/ML applications, where it came from, and how to apply it in current and future designs. » read more

Nvidia’s Top Technologists Discuss The Future Of GPUs

By Ed Sperling And Susan Rambo - 10 Sep, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the role of the GPU in artificial intelligence, autonomous and assisted driving, advanced packaging and heterogeneous architectures with Bill Dally, Nvidia’s chief scientist, and Jonah Alben, senior vice president of Nvidia’s GPU engineering, at IEEE’s Hot Chips 2019 conference. What follows are excerpts of that conversation. SE: There are ... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?