Week 27: Announcing DAC TV

By Anne Cirkel - 12 Dec, 2014 - Comments: 1

I’m just back from a few days in San Jose, which luckily is only a short flight away from Portland. After so many of these trips I've found that most of the time I'm surrounded by familiar faces and the one or two flustered employees that couldn’t catch their much more convenient corporate commuter flight. I have to admit the idea of bypassing airport security and just showing my badge, gra... » read more

Week 22: Missed Opportunities

By Anne Cirkel - 07 Nov, 2014 - Comments: 0

Have you ever forgotten that you should be at a specific meeting or woken up in the middle of the night sure you’re not remembering something important? In our age of distraction, surely one of those remembralls from Harry Potter’s world would come in handy and find a huge market. Is anyone in the tech world working on one? (No, reminder apps don’t count.) Then there is pain of missing so... » read more

Week 19: Ready. Steady. Go!

By Anne Cirkel - 17 Oct, 2014 - Comments: 2

The window for submitting to the IP and designer tracks opens on Oct. 23. It’s time to get ready and check with your management if you can present your work at DAC. You can find the submission details and a link to last year’s content here. You can even browse presentation examples from past designer tracks. If you are an EDA vendor, the designer track is a good opportunity for your use... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: AdaptIP

Week 27: Announcing DAC TV

Week 22: Missed Opportunities

Week 19: Ready. Steady. Go!