tag: Advantest

Chip Industry Week In Review
By The SE Staff - 17 May, 2024 - Comments: 0

President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel ... » read more

The Future Of Fault Coverage In Chips
By Gregory Haley - 14 May, 2024 - Comments: 0

Heterogeneous integration and sophisticated packaging are making chips more difficult to test, necessitating more versatile and efficient testing methods to minimize the time and cost it takes for each test insertion. In the past, test costs typically were limited to about 2% of the total cost of a chip. That cost has been rising in recent years, and with chiplets, advanced packaging, and mo... » read more

The Crucial Role Of High-Performance Computing In 2024: Balancing Cost And Innovation
By Keith Schaub - 14 May, 2024 - Comments: 0

We live in a world where digital queries run the Information Superhighway and in turn, our lives. This means that the importance of High-Performance Computing (HPC) cannot be overstated. The technology behind this continues to be a cornerstone for advancing our world and improving productivity. To put it another way, can you imagine a day, a week, when you are not querying something? So, let... » read more

Improvement of High-Gradation DDIC Device Test Yield By T6391 High-Accuracy Measurement Solution
By Advantest - 14 May, 2024 - Comments: 0

For DDIC (Display Driver IC) for OLED (Organic Light Emitting Diode) displays for smartphones and IT displays (tablets, laptops) and head mounted displays for AR (Augmented Reality)/VR (Virtual Reality), the output voltage will be divided into more highly-defined steps than in the past. A new per-pin digitizer and comparator module “LCD HP” was developed to measure the output voltage of the... » read more

Doing More At Functional Test
By Anne Meixner - 14 May, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the increasing importance of functional test, especially in high-performance computing, with Klaus-Dieter Hilliges, V93000 platform extension manager at Advantest Europe; Robert Cavagnaro, fellow in the Design Engineering Group at Intel (responsible for manufacturing and test strategy of data center products); Nitza Basoco, tec... » read more

Chip Industry Week In Review
By The SE Staff - 19 Apr, 2024 - Comments: 0

SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at t... » read more

Chip Industry Week In Review
By The SE Staff - 12 Apr, 2024 - Comments: 0

Applied Materials may scale back or cancel its $4 billion new Silicon Valley R&D facility in light of the U.S. government's recent announcement to reduce funding for construction, modernization, or expansion of semiconductor research and development (R&D) facilities in the United States, according to the San Francisco Chronicle. TSMC could receive up to $6.6 billion in direct funding... » read more

IC Test And Quality Requirements Drive New Collaboration
By Laura Peters - 09 Apr, 2024 - Comments: 0

Rapidly increasing chip and package complexity, coupled with an incessant demand for more reliability, has triggered a frenzy of alliances and working relationships that are starting to redefine how chips are tested and monitored. At the core of this shift is a growing recognition that no company can do everything, and that to work together will require much tighter integration of flows, met... » read more

New Strategies For Interpreting Data Variability
By Gregory Haley - 09 Apr, 2024 - Comments: 0

Every measurement counts at the nanoscopic scale of modern semiconductor processes, but with each new process node the number of measurements and the need for accuracy escalate dramatically. Petabytes of new data are being generated and used in every aspect of the manufacturing process for informed decision-making, process optimization, and the continuous pursuit of quality and yield. Most f... » read more

Fabrication Of Vertical-Taper Structures For Silicon Photonic Devices By Using Local-Thickness-Thinning Process
By Advantest - 09 Apr, 2024 - Comments: 0

Authors: Shunsuke Abe, Hideo Hara, Shin Masuda, and Hirohito Yamada. This paper describes a simple fabrication process of verticaltaper structures which can locally tune the thickness of silicon photonic devices. For low-loss spot-size conversion, taper angles less than 10° are required. To fabricate the gradual-slope shape of the vertical tapers, we have developed a step-andexposure lithog... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy