EDA Pushes Deeper Into AI

By Karen Heyman - 30 Nov, 2023 - Comments: 0

EDA vendors are ramping up the use of AI/ML in their tools to help chipmakers and systems companies differentiate their products. In some cases, that means using AI to design AI chips, where the number and breadth of features and potential problems is exploding. What remains to be seen is how well these AI-designed chips behave over time, and where exactly AI benefits design teams. And all o... » read more

Considerations For Accelerating On-Device Stable Diffusion Models

By Pat Donnelly - 30 Nov, 2023 - Comments: 0

One of the more powerful – and visually stunning – advances in generative AI has been the development of Stable Diffusion models. These models are used for image generation, image denoising, inpainting (reconstructing missing regions in an image), outpainting (generating new pixels that seamlessly extend an image's existing bounds), and bit diffusion. Stable Diffusion uses a type of dif... » read more

Artificial Intelligence Wonderland

By Barry Pangrle - 30 Nov, 2023 - Comments: 0

Silicon Catalyst held its Sixth Annual Semiconductor Forum in Menlo Park on the SRI campus on November 9th. Richard Curtin, Managing Partner for Si Catalyst, opened the event with a reference to Arthur C. Clarke’s "2001: A Space Odyssey" and noted how remarkable it was that a novel written back in 1968 was able to foretell the direction of the computer industry over 50 years into the future. ... » read more

SoC Integration And Data Transport Architecture Requirements Surge In 2023

By Frank Schirrmeister - 30 Nov, 2023 - Comments: 0

As the holiday season is in full swing, it's retrospection and prediction time! Let's look at what I thought 2023 would look like, review how it turned out, and take a first stab at 2024 predictions. As a spoiler, my biggest surprise was the intensity with which artificial intelligence and machine learning (AI/ML) accelerated since Generative AI was put on the mainstream adoption map last year,... » read more

Making Heterogeneous Integration More Predictable

By Ed Sperling - 29 Nov, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss problems and potential solutions in heterogeneous integration with Dick Otte, president and CEO of Promex Industries; Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology; Shekhar Kapoor, senior director of product management at Synopsys; John Park, product management group director in Cadence's Custom I... » read more

Improving AI Productivity With AI

By Ed Sperling - 28 Nov, 2023 - Comments: 0

AI is showing up or proposed for nearly all aspects of chip design, but it also can be used to improve the performance of AI chips and to make engineers more productive earlier in the design process. Matt Graham, product management group director at Cadence, talks with Semiconductor Engineering about the role of AI in identifying patterns that are too complex for the human brain to grasp, how t... » read more

Applying ML In Failure Analysis

By Anne Meixner - 20 Nov, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss how increasing complexity in semiconductor and packaging technology is driving shifts in failure analysis methods, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran H... » read more

Chip Industry Week In Review

By The SE Staff - 17 Nov, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan Japan's Rapidus and the University of Tokyo are teaming up with France's Leti to meet its previously announced mass production goal of 2nm chips by 2027, and chips in the 1nm range in the 2030s. Rapidus was formed in 2022 with the support of eight Japanese companies — Sony, Kioxia, Denso, NEC, NTT, SoftBank, Toyota, and Mitsubishi's banking arm, ... » read more

Center For Deep Learning In Electronics Manufacturing: Bringing Deep Learning To Production For Photomask Manufacturing

By Jan Willis - 16 Nov, 2023 - Comments: 0

The Center for Deep Learning in Electronics Manufacturing (CDLe) was formed as an alliance between D2S, Mycronic and NuFlare Technology in autumn 2018. Assignees from each alliance partner worked with deep learning (DL) experts under the leadership of Ajay Baranwal, director of CDLe. The CDLe’s mission was to 1) turn DL into a core competency inside each of the companies and 2) do DL projects... » read more

Maximizing Edge Intelligence Requires More Than Computing

By Toshikazu Nishida - 16 Nov, 2023 - Comments: 0

By Toshi Nishida, Avik W. Ghosh, Swaminathan Rajaraman, and Mircea Stan Commercial-off-the-shelf (COTS) components have enabled a commodity market for Wi-Fi-connected appliances, consumer products, infrastructure, manufacturing, vehicles, and wearables. However, the vast majority of connected systems today are deployed at the edge of the network, near the end user or end application, opening... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: AI