What Will That Chip Cost?


In the past, analysts, consultants, and many other experts attempted to estimate the cost of a new chip implemented in the latest process technology. They concluded that by the 3nm node, only a few companies would be able to afford them — and by the time they got into the angstrom range, probably nobody would. Much has changed over the past few process nodes. Increasing numbers of startups... » read more

Unlocking The Power Of Edge Computing With Large Language Models


In recent years, Large Language Models (LLMs) have revolutionized the field of artificial intelligence, transforming how we interact with devices and the possibilities of what machines can achieve. These models have demonstrated remarkable natural language understanding and generation abilities, making them indispensable for various applications. However, LLMs are incredibly resource-intensi... » read more

Chip Industry Week In Review


By Susan Rambo, Karen Heyman, and Liz Allan The Biden-Harris administration designated 31 Tech Hubs across the U.S. this week, focused on industries including autonomous systems, quantum computing, biotechnology, precision medicine, clean energy advancement, and semiconductor manufacturing. The Department of Commerce (DOC) also launched its second Tech Hubs Notice of Funding Opportunity. ... » read more

The Limits Of AI-Generated Models


In several recent stories, the subject of models has come up, and one recurrent theme is that AI may be able to help us generate models of a required abstraction. While this may be true in some cases, it is very dangerous in others. If we generalize, AI should be good for any model where the results are predominantly continuous, but discontinuities create problems. Unless those are found and... » read more

Anatomy Of A System Simulation


The semiconductor industry has greatly simplified analysis by consolidating around a small number of models and abstractions, but that capability is breaking down both at the implementation level and at the system level. Today, the biggest pressure is coming from the systems industry, where the electronic content is a small fraction of what must be integrated together. Systems companies tend... » read more

AI For Circuit Design Quality, Productivity, And Advanced-Node Mapping


The future of circuit design, encompassing analog, RF/5G, and custom electronic circuits, is set to be revolutionized by the integration of generative AI tools. These advanced tools will not only enhance the quality of designs and boost designer productivity but also facilitate the mapping of designs from older semiconductor process nodes to more advanced nodes such as 3nm and below. This blog ... » read more

Why A DSP Is Indispensable In The New World of AI


Chips being designed today for the automotive, mobile handset, AI-IoT (artificial intelligence - Internet of things), and other AI applications will be fabricated in a year or two, designed into end products that will hit the market in three or more years, and then have a product lifecycle of at least five years. These chips will be used in systems with a large number and various types of senso... » read more

Research Bits: October 24


Photonic-electronic hardware processes 3D data Researchers from the University of Oxford, University of Muenster, University of Heidelberg, and University of Exeter are developing integrated photonic-electronic hardware capable of processing three-dimensional data, which the team claims boosts data processing parallelism for AI tasks. The researchers added an extra parallel dimension to the... » read more

Energy Usage in Layers Of Computing (SLAC)


A technical paper titled “Energy Estimates Across Layers of Computing: From Devices to Large-Scale Applications in Machine Learning for Natural Language Processing, Scientific Computing, and Cryptocurrency Mining” was published by researchers at SLAC National Laboratory and Stanford University. Abstract: "Estimates of energy usage in layers of computing from devices to algorithms have bee... » read more

Big Changes Ahead For Photomask Technology


The move to curvilinear shapes on photomasks is gaining steam after years of promise as a way of improving yield, lowering defectivity, and reducing wasted space on a die — all of which are essential for both continued scaling and improved reliability in semiconductors. Interest in this approach ran high at this year's SPIE Photomask Technology + EUV Lithography Conference. Put simply, cur... » read more

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