Rigorous Correlation Methodology for PCIe 5.0 & PCIe 6.0 DSP Based IBIS-AMI Models

By Alphawave Semi - 24 Apr, 2024 - Comments: 0

IBIS-AMI models have been around for a decade and evolved to provide off-chip and system designers an efficient way to assess link performance of high-speed electrical interfaces with transceivers implementing various combination of equalization techniques [1]. As with any model, for IBIS-AMI to be useful they need to be benchmarked and carefully correlated to real-world silicon performance of ... » read more

The Data Crisis Is Unfolding — Are We Ready?

By Alphawave Semi - 27 Mar, 2024 - Comments: 0

The rapid advancement of technology has led to an unprecedented amount of data being generated, captured, and consumed globally. However, this reliance on data comes at a considerable cost. The widespread sharing and processing of data is necessary to navigate our everyday lives. Still, any disruption to this process can have severe consequences, threatening our ability to function as a society... » read more

SRAM In AI: The Future Of Memory

By Karen Heyman - 09 Nov, 2023 - Comments: 0

Experts at the Table — Part 1: Semiconductor Engineering sat down to talk about AI and the latest issues in SRAM with Tony Chan Carusone, CTO at Alphawave Semi; Steve Roddy, chief marketing officer at Quadric; and Jongsin Yun, memory technologist at Siemens EDA. What follows are excerpts of that conversation. Part two of this conversation can be found here and part three is here. [L-R]: ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: Alphawave Semiconductor

Rigorous Correlation Methodology for PCIe 5.0 & PCIe 6.0 DSP Based IBIS-AMI Models

The Data Crisis Is Unfolding — Are We Ready?

SRAM In AI: The Future Of Memory

Trending Articles

NAND Flash Targets 1,000 Layers

One Chip Vs. Many Chiplets

FOPLP Gains Traction in Advanced Semiconductor Packaging

HBM Options Increase As AI Demand Soars

Asia Government Funding Surges

Knowledge Centers
Entities, people and technologies explored