Data Leakage In Heterogeneous Systems


Semiconductor Engineering sat down with Paul Chou, senior director of security architecture at NVIDIA, to discuss data leakage in heterogeneous designs. What follows are excerpts of that one-on-one interview, which was held in front of a live audience at the Hardwear.io conference. SE: We think about hardware in terms of a chip, but increasingly there is data moving through different systems... » read more

Power/Performance Bits: Dec. 1


Self-erasing chip Researchers from the University of Michigan developed self-erasing chips that could be used to prevent counterfeiting or detect tampering. The technology is based on a new material that temporarily stores energy, changing the color of the light it emits. It self-erases in a matter of days, or it can be erased on demand. "It's very hard to detect whether a device has been t... » read more

Scaling Anti-Tamper Protection To Meet Escalating Threats


Anti-tamper tends to be one of those catchall phrases encompassing any countermeasure on a security chip. A more precise definition would be that anti-tamper protection is any collection of countermeasures that serves to thwart an adversary’s attempt to monitor or affect the correct operation of a chip or a security core within a chip. Given that, it can be useful to think about a hierarchy o... » read more