NoC Your SoCs Off

By Ed Sperling The network on a chip (NoC) approach is gaining ground as an essential part of a system on a chip (SoC), providing the same kind of time-to-market advantage that well-tested intellectual property blocks provide. This follows almost eight years of hype about NoCs potential with little to show for it. Times have changed and there appear to be two main drivers, one technological a... » read more

The Quest For Faster Data Throughput On A Chip

By Ed Sperling As with all network topologies, the general rule is the faster the better. Jack Browne, VP of sales and marketing at Sonics, said his customers are asking for higher-speed interconnects. “Right now we’re at 300MHz,” he said. “They want to more than double that in the very near future and eventually get to 1GHz.” Getting to that speed is no simple ... » read more

Making A Multicore System Work

If you think designing a single-core system is hard, designing multicore systems is multiple times harder. Connecting all the pieces together and making them work properly, if not together, is one of the hardest tasks design engineers and architects will ever face. System-Level Design tracked down some of the experts in this field and sat them down around a table to discuss what’s going... » read more

SOI Goes Mainstream

By Ed Sperling The crossover for system on insulator (SOI) versus bulk CMOS was supposed to happen at the 22nm, but that was before software developers ran into problems programming multicore chips. For years, SOI was considered the high-performance cousin of CMOS—more expensive, more difficult to manufacture and unnecessary for most applications. It is the heart of the Cell processor, ... » read more

Cross-Talking with TLM 2.0

By Ed Sperling It’s almost like flying over the Great Plains of the United States. On the ground it’s hard to see above the corn stalks, but in an airplane you can see the entire horizon even if you can’t see those stalks anymore. The analogy is similar to where most of the major players in chip design say the engineering for systems on chips needs to go. With millions more gates avai... » read more

New Challenges For Hardware Engineers

  It used to be fun to be a chip architect. You could wake up in the morning, grab a cup of strong black coffee and run through a few power and performance tradeoff calculations before deciding on the high-level architecture. That would set the engineering direction for months, if not years. On a good day, after introducing a steady infusion of caffeine into your bloodstream, you felt like ... » read more