Chip Industry Week in Review


Check out the Inside Chips podcast for our behind-the-scenes analysis of changes at Intel Foundry. Intel rolled out its updated process technology roadmap this week, along with early process design kit (PDK) for its 14A gate-all-around process technology. That node will utilize high-NA EUV, and include direct contact power delivery, the second generation of its backside power delivery techno... » read more

Can Chiplets Serve Cost-Conscious Apps?


Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption. One of the main reasons for the cost increase is the need for advanced packaging when employi... » read more

Innovation And Collaboration In Power Module Packaging: A Thermal Perspective


Power modules are the foundation of modern electrical systems, especially within electric vehicles (xEVs), industrial motor applications, and renewable energy solutions such as wind and solar power. As the demand for more power in smaller and lighter systems grows, managing heat dissipation has become a major challenge, as the thermal energy from high current flows can lead to reliability issue... » read more

Fine-Line RDL Structure Analysis of Fan-Out Chip-on-Substrate Platform


Abstract: "The demand for high bandwidth memory (HBM) has driven the need for advanced packaging solutions, particularly those involving fan-out layers to interconnect wafers within packages. To meet the high-bandwidth requirements of the Fan-Out Chip-on-Substrate (FOCoS) technology platform, additional layers are required. However, as the number of fanout layers increases, significant chall... » read more

Chip Industry Week In Review


Check out our new Inside Chips podcast. President Trump’s ‘Liberation Day’ tariffs were announced this week. The executive order stated that semiconductors and copper imports are not directly subject to the reciprocal tariff, although the exemption may be short-lived. Semiconductor equipment and tools were not mentioned, leaving the industry searching for clarification. Regardless, hig... » read more

Benefits And Challenges In Multi-Die Assemblies


Experts at the Table: Semiconductor Engineering sat down to discuss chiplets, hybrid bonding, and new materials with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What follows are excerpts of that discussion. To view part one of t... » read more

Need For KGD Drives Singulated Die Screening


The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly higher than with a single die. Better methods for inspecting and testing these devices are already starting to roll out. High-throughput infrared inspection is capable of catching more sub-surface d... » read more

Chip Industry Week In Review


McKinsey issued a new report on the state of the chemical supply chain for semiconductors in the U.S., citing potential shortages of high-purity materials such as tungsten, aluminum and copper, lack of access to CMP slurries and photoresists for EUV, and rising competition for high-k precursors that can fetch higher prices outside of the U.S. CSIS weighed in on the U.S. goverment's recent ... » read more

AI And Semiconductor In Reciprocity


In today’s rapidly advancing technological era, AI has become a powerful catalyst for innovation and progress. Advanced semiconductor packaging plays a crucial role in supporting AI development, while AI applications create new semiconductor demands and drive the development of semiconductor technologies, with both complementing each other. Semiconductor packaging: The bridge between chip an... » read more

Chip Industry Week In Review


ASML and imec signed a five-year strategic partnership to advance semiconductor innovation and sustainable technology. The collaboration will leverage ASML’s full product portfolio, including high-NA EUV, DUV immersion, and advanced metrology tools, within imec’s pilot line for sub-2nm R&D. Supported by EU and national funding, it will also drive research in silicon photonics, memory, a... » read more

← Older posts