Chip Industry Week in Review

By The SE Staff - 25 Apr, 2025 - Comments: 0

To listen to the podcast version, click here. TSMC unveiled an unusually detailed roadmap at this week's North America Technology Symposium, including future architectures for 3D-ICs for high-performance computing and small, extremely low-power chips for AR/VR glasses, and two implementations of system-on-wafer. Fig. 1: TSMC's future packaging and stacking roadmap. Source: TSMC The ... » read more

Chip Industry Week In Review

By The SE Staff - 18 Apr, 2025 - Comments: 0

[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

Chip Industry Week In Review

By The SE Staff - 14 Mar, 2025 - Comments: 0

ASML and imec signed a five-year strategic partnership to advance semiconductor innovation and sustainable technology. The collaboration will leverage ASML’s full product portfolio, including high-NA EUV, DUV immersion, and advanced metrology tools, within imec’s pilot line for sub-2nm R&D. Supported by EU and national funding, it will also drive research in silicon photonics, memory, a... » read more

EUV’s Future Looks Even Brighter

By Gregory Haley - 20 Feb, 2025 - Comments: 1

The rapidly increasing demand for advanced-node chips to support everything-AI is putting pressure on the industry's ability to meet demand. The need for cutting-edge semiconductors is accelerating in applications ranging from hyperscale data centers powering large language models to edge AI in smartphones, IoT devices, and autonomous systems. But manufacturing those chips relies heavily on ... » read more

Chip Industry Technical Paper Roundup: Feb. 4

By Linda Christensen - 04 Feb, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=403 /] Find all technical papers here. » read more

Controlling Speckle Contrast Using Existing Lithographic Scanner Knobs to Understand LWR (Samsung, ASML)

By Technical Paper Link - 29 Jan, 2025 - Comments: 0

A new technical paper titled "Controlling Speckle Contrast Using Existing Lithographic Scanner Knobs to Explore the Impact on Line Width Roughness" was published by researchers at Samsung, ASML and Sungkyunkwan University. Abstract "Local critical dimension uniformity (LCDU) or line width roughness (LWR) is increasingly important in argon fluoride (ArF) immersion lithography systems (scanne... » read more

Global IC Fabs And Facilities Report: 2024

By Liz Allan - 21 Jan, 2025 - Comments: 0

The chip industry made significant capital investments this year to build new fabs and facilities or expand existing premises. A number of sites were dedicated to SiC, GaN, DRAM, HBM, along with packaging and assembly by OSATs, and essential gases, chemicals, and other components. More than a dozen R&D centers were also established for 8-inch wafers, EUV, and advanced packaging. Investments... » read more

EMEA Investments Driving Technology Specialization

By Liz Allan - 04 Nov, 2024 - Comments: 0

Government programs across Europe and the UK are seeing a surge of investments in leading edge technology, materials, and packaging. Industry and academia are coalescing around specialty areas, drawing on established relationships to foster innovation and fill gaps in regional supply chains while also maintaining international bonds. Government initiatives also are picking up in Israel, Saudi A... » read more

Chip Industry Technical Paper Roundup: Oct. 14

By Linda Christensen - 14 Oct, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=367 /] More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

High-NA EUV Lithography: Enhancing Resolution By Split Pupil Exposure (Fraunhofer, ASML)

By Technical Paper Link - 08 Oct, 2024 - Comments: 0

A new technical paper titled "Resolution enhancement for high-numerical aperture extreme ultraviolet lithography by split pupil exposures: a modeling perspective" was published by researchers at Fraunhofer IISB and ASML. The open source paper published on SPIE states: "The lithographic imaging performance of extreme ultraviolet (EUV) lithography is limited by the efficiency of light diffrac... » read more

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tag: ASML

Chip Industry Week in Review

Chip Industry Week In Review

Chip Industry Week In Review

EUV’s Future Looks Even Brighter

Chip Industry Technical Paper Roundup: Feb. 4

Controlling Speckle Contrast Using Existing Lithographic Scanner Knobs to Understand LWR (Samsung, ASML)

Global IC Fabs And Facilities Report: 2024

EMEA Investments Driving Technology Specialization

Chip Industry Technical Paper Roundup: Oct. 14

High-NA EUV Lithography: Enhancing Resolution By Split Pupil Exposure (Fraunhofer, ASML)

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