tag: Atrenta

Are More Processor Cores Better?
By Brian Bailey - 06 Nov, 2014 - Comments: 0

Up until the early 2000s, each generation of processor was faster, used more exotic architectures, had deeper pipelines, used more transistors, ran at higher clock frequencies and consumed more power. In fact power was rising faster than performance and led to the extrapolation that within a few generations, processors would run as hot as nuclear reactors. Something had to change, and that c... » read more

Power Exploration: MLB World Series, Bumgarner, And Box Scores
By Mark Baker - 06 Nov, 2014 - Comments: 0

The San Francisco Giants are fresh off their third Major League Baseball (MLB) World Series win in the last 5 years. That's notable in itself, but then consider Madison Bumgarner, the starting pitcher for the Giants who was named the 2014 World Series MVP. Bumgarner finished this year’s series with a 2-0 record, one five-inning save (game seven) and 0.43 ERA in three appearances, highlighting... » read more

Automated Assertion-Based Verification Methodologies For IP And SoC Development
By Atrenta - 05 Nov, 2014 - Comments: 0

The rapid growth in complexity and size of modern System on Chip devices (SoCs), along with the expense of developing these ICs, has driven the need for design reusability. Today, SoC designs are typically built as a collection of individual IP (Intellectual Property) blocks stitched together with glue logic. These IP can be sourced from multiple design teams, including many 3rd-party teams. So... » read more

The Week In Review: Design
By Ed Sperling - 24 Oct, 2014 - Comments: 0

IP Cadence rolled out a portfolio of stacked die memory verification IP to support Wide I/O-2, Hybrid Memory Cube, high-bandwidth memory, and DDR4-3DS. Included are direct memory access for read, write, save, preload and comparison of memory contents, assertions, error configurability, and a built-in address manager. ARM rolled out additions to its enterprise-class SoC interconnects for qua... » read more

Balancing The Cost Of Test
By Brian Bailey - 23 Oct, 2014 - Comments: 0

As semiconductor devices became larger and more complex, the cost of [getkc id="174" kc_name="test"] increased. Testers were large pieces of capital equipment designed to execute functional vectors at-speed and the technology being used had to keep up with increasing demands placed on them. Because of this, the cost of test did not decrease in the way that other high-tech equipment did. Around ... » read more

Blog Review: Oct. 15
By Ed Sperling - 15 Oct, 2014 - Comments: 0

Obesity makes your liver age faster, but you'll need a sophisticated biological clock to see that. Ansys' Bill Vandermark uncovers the top 5 engineering articles of the week. This one includes cyborg horses and an implanted prosthetic arm. Mentor's Colin Walls takes a look at "hard" and "soft" real time. It sounds like something out of a Salvador Dali painting. Rambus' Aharon Etengoff t... » read more

High-Level Gaps Emerge
By Ann Mutschler - 15 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the attributes of a high-level, front-end design flow with Bernard Murphy, CTO at [getentity id="22026" e_name="Atrenta"]; Leah Clark, associate technical director for digital video technology at Broadcom; Phil Bishop, vice president of the system level design system & verification group at [getentity id="22032" e_name="Cadence"]; and Jon McDon... » read more

Tech Talk: Power Optimization II
By Ed Sperling - 13 Oct, 2014 - Comments: 0

Solaiman Rahim, senior director of engineering at Atrenta, talks with Semiconductor Engineering about where to put your efforts to reap the greatest rewards in power reduction and optimization. This is the second of two parts. [youtube vid=OWyzIyEH_pQ] Part one can be viewed here. » read more

Architecture Versus Silicon
By Ann Mutschler - 09 Oct, 2014 - Comments: 0

For many, if not most designs today, power is everything. Determining where power is being lost is critical to making sure the design is optimized. So where to begin? To this end, it is useful to go back to the fundamentals of what power is and what power consumption is, noted Paul Traynar, software architect at [getentity id="22021" comment="ANSYS/Apache"]. “Power is proportional to capac... » read more

Software Before Hardware?
By Ed Sperling - 09 Oct, 2014 - Comments: 0

The emphasis on battery life in wearable electronics, including always-on sensors, and the cost of powering and cooling racks of servers inside of data centers, are beginning to impact the formula for designing systems. Power is now a critical design element, but it's also one of the most stubborn to tackle. While ASICs, SoCs and FPGAs all have focused on being able to efficiently run softwa... » read more

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