Glitched On Earth By Humans

By Jasper van Woudenberg - 03 Nov, 2022 - Comments: 0

The Black Hat conference always brings up interesting and current research within the device security industry. Lennert Wouters of COSIC studied the security of the Starlink User Terminal. After some PCB-level reverse engineering, he found a serial port and observed various boot loaders, U-boot, and Linux running on the device. However, there was no obvious way to gain further access. The... » read more

Executive Insight: Wally Rhines

By Ed Sperling - 06 Oct, 2016 - Comments: 0

[getperson id="11694" p_name="Wally Rhines"], chairman and CEO of [getentity id="22017" e_name="Mentor Graphics"], sat down with Semiconductor Engineering to talk about changes in automotive electronics, IoT security issues, and how this affects semiconductor design. What follows are excerpts of that conversation. SE: In automotive, one of the big changes is that we are no longer dealing wit... » read more

OSI’s Model For Security

By Ernest Worthman - 02 Oct, 2014 - Comments: 0

In just six years, according to Cisco Systems, there will be 50 billion devices interconnected within the IoT universe. IDC puts that number at a whopping 212 billion. Either way, it really doesn't matter. The fact is that the vast majority will be talking to each other, autonomously, and though the cloud – a nightmare management scenario, no matter how one spins it. The implications of th... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Black Hat

Glitched On Earth By Humans

Executive Insight: Wally Rhines

OSI’s Model For Security