Tackling Safety And Security


Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Disregard Safety And Security At Your Own Peril


Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Evolution Of Verification Engineers


Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, chief executive officer for VTool; Adnan Hamid, chief executive office for Breker Verification; Mark Olen, product marketing manager for Mentor, a Siemens Business; Jim Hogan, managing partner of Vista Ventures; Sharon Rosenberg, senior solutions archit... » read more

Incremental System Verification


Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, chief executive officer for VTool; Adnan Hamid, chief executive office for Breker Verification; Mark Olen, product marketing manager for Mentor, a Siemens Business; Jim Hogan, managing partner of Vista Ventures; Sharon Rosenberg, senior solutions archit... » read more

When Verification Leads


Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, CEO for VTool; Adnan Hamid, CEO for Breker Verification; Mark Olen, product marketing manager for Mentor, a Siemens Business; Jim Hogan, managing partner of Vista Ventures; Sharon Rosenberg, senior solutions architect for Cadence Design Systems; and Tom... » read more

Designing For Ultra-Low-Power IoT Devices


Optimizing designs for power is becoming the top design challenge in battery-driven IoT devices, boxed in by a combination of requirements such as low cost, minimum performance and functionality, as well as the need for at least some of the circuits to be always on. Power optimization is growing even more complicated as AI inferencing moves from the data center to the edge. Even simple sens... » read more

EDA Cloud Adoption Hits Speed Bumps


If moving semiconductor design to the Cloud was easy and beneficial, everyone would be doing it. But so far, few have done more than dip a toe. The level of difficulty associated with migrating to the Cloud varies, depending upon who you talk to. The reality is that not everyone makes it as easy as it could be, or is not willing to put the necessary effort into making it easier. There is cer... » read more

Auto Chip Design, Test Changes Ahead


The automotive industry’s unceasing demand for performance, coupled with larger and more complex processors, are driving broad changes in how electronics are designed, verified and tested. What's changing is that these systems, which include AI-oriented logic developed at the most advanced process nodes, need to last several times longer than traditional IT and consumer devices, and they n... » read more

Chip Dis-Integration


Just because something can be done does not always mean that it should be done. One segment of the semiconductor industry is learning the hard way that continued chip integration has a significant downside. At the same time, another another group has just started to see the benefits of consolidating functionality onto a single substrate. Companies that have been following Moore's Law and hav... » read more

DAC Day Three: UVM, Machine Learning And DFT Come Together


The industry and users have a love/hate relationship with UVM. It has quickly risen to become the most used verification methodology and yet at the same time it is seen as being overly complex, unwieldy and difficult to learn. The third day of DAC gets started with breakfast with Accellera to discuss UVM and what we can expect to see in the next 5 years. The discussion was led by Tom Alsop, pri... » read more

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