tag: Cambridge University

Chip Industry Technical Paper Roundup: Feb. 4
By Linda Christensen - 04 Feb, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=403 /] Find all technical papers here. » read more

Processing-Using-DRAM: Attaining High-Performance Via Dynamic Precision Bit-Serial Arithmetic (ETH Zurich, et al.)
By Technical Paper Link - 01 Feb, 2025 - Comments: 0

A new technical paper titled "Proteus: Achieving High-Performance Processing-Using-DRAM via Dynamic Precision Bit-Serial Arithmetic" was published by researchers at ETH Zurich, Cambridge University, Universidad de Córdoba, Univ. of Illinois Urbana-Champaign and NVIDIA Research. Abstract "Processing-using-DRAM (PUD) is a paradigm where the analog operational properties of DRAM structures ... » read more

Schottky Barrier Transistors: Status, Challenges and Modeling Tools
By Technical Paper Link - 08 Jan, 2025 - Comments: 0

A technical paper titled "Roadmap for Schottky barrier transistors" was published by researchers at University of Surrey, Namlab gGmbH, Forschungszentrum Jülich (FZJ), et al. Abstract "In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier (SB), as an asset for device functio... » read more

Chip Industry Week In Review
By The SE Staff - 11 Oct, 2024 - Comments: 0

Imec announced a new automotive chiplet consortium to evaluate which different architectures and packaging technologies are best for automotive applications. Initial members includes Arm, ASE, Cadence, Siemens, Synopsys, Bosch, BMW, Tenstorrent, Valeo, and SiliconAuto. Imec also launched star, a global network bringing together automotive and semiconductor innovators to address technological c... » read more

Chip Industry Technical Paper Roundup: Sept. 9
By Linda Christensen - 09 Sep, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=354 /] More ReadingTechnical Paper Library home » read more

New Strategies For Enhancing Transport Properties of Conducting Polymers (Cambridge, et al.)
By Technical Paper Link - 06 Sep, 2024 - Comments: 0

A new technical paper titled "Non-equilibrium transport in polymer mixed ionic–electronic conductors at ultrahigh charge densities" was published by researchers at Cambridge University, Grenoble Alpes University, CNRS, Humboldt-Universität zu Berlin, et al. Abstract "Conducting polymers are mixed ionic–electronic conductors that are emerging candidates for neuromorphic computing, bioel... » read more

Chip Industry Technical Paper Roundup: July 22
By Linda Christensen - 22 Jul, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library. [table id=245 /] More ReadingTechnical Paper Library home » read more

SiC Power Electronics Packaging: Floating Die Structure and Liquid Metal Fluidic Connection (Cambridge U. )
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Liquid Metal Fluidic Connection and Floating Die Structure for Ultralow Thermomechanical Stress of SiC Power Electronics Packaging" was published by researchers at Cambridge University. Abstract "Coefficients of thermal expansion (CTE) of various materials in packaging structure layers vary largely, causing significant thermomechanical stress in power electroni... » read more

Research Bits: December 11
By Jesse Allen - 11 Dec, 2023 - Comments: 0

Diamond device with high breakdown voltage Researchers from the University of Illinois at Urbana-Champaign developed diamond p-type lateral Schottky barrier diodes they say have the highest breakdown voltage and lowest leakage current compared to previous diamond devices. The diamond device can sustain high voltage, approximately 5 kV, although the voltage was limited by setup of measurement a... » read more

New Concepts Required For Security Verification
By Brian Bailey - 28 Aug, 2023 - Comments: 0

Verification for security requires new practices in both the development and verification flows, but tools and methodologies to enable this are rudimentary today. Flows are becoming more complex, especially when they span multiple development groups. Security is special in that it is pervasive throughout the development process, requiring both positive and negative verification. Positive ver... » read more

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