Chip Industry Technical Paper Roundup: Oct. 22


New technical papers recently added to Semiconductor Engineering’s library: [table id=371 /]   More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

3D Device With BEOL-Compatible Channel And Physical Design for Efficient Double-Side Routing


A new technical paper titled "Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock" was published by researchers at Stanford University, Intel Corporation, and Carnegie Mellon University. Abstract "This paper presents Omni 3D - a 3D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D arbitrarily interleaves ... » read more

Chip Industry Week In Review


Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Chip Industry Technical Paper Roundup: Sept. 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Improving The Air-Stability and NBTI Reliability of BEOL CNFETs


A new technical paper titled "Overcoming Ambient Drift and Negative-Bias Temperature Instability in Foundry Carbon Nanotube Transistors" was published by researchers at MIT, Stanford University, Carnegie Mellon University and Analog Devices. Abstract: "Back-end-of-line (BEOL) logic integration is emerging as a complementary scaling path to supplement front-end-of-line (FEOL) Silicon. Among ... » read more

Security Technical Paper Roundup: Aug. 27


A number of hardware security-related technical papers were presented at the August 2024 USENIX Security Symposium. The organization provides open access research, and the presentation slides and papers are free to the public. Topics include side-channel attacks and defenses, embedded security, fuzzing, fault injection, logic locking, Rowhammer, and more. Here are some highlights with associate... » read more

Data Memory-Dependent Prefetchers Pose SW Security Threat By Breaking Cryptographic Implementations


A technical paper titled “GoFetch: Breaking Constant-Time Cryptographic Implementations Using Data Memory-Dependent Prefetchers” was presented at the August 2024 USENIX Security Symposium by researchers at University of Illinois Urbana-Champaign, University of Texas at Austin, Georgia Institute of Technology, University of California Berkeley, University of Washington, and Carnegie Mellon U... » read more

Research Bits: July 30


Embedded thermoelectric devices Researchers from the University of Pittsburgh and Carnegie Mellon University propose using locally embedded thermoelectric devices (TEDs) to perform active cooling inside circuits. “Circuits like clock generators and arithmetic and logic units (ALU) create high-frequency heat fluxes with their peak hot spots occurring on the microprocessor,” said Feng Xio... » read more

Chip Industry Technical Paper Roundup: July 8


New technical papers recently added to Semiconductor Engineering’s library. [table id=238 /] More ReadingTechnical Paper Library home » read more

Thermoelectric Active Cooling Hot Spots in Chips


A technical paper titled “Thermoelectric active cooling for transient hot spots in microprocessors” was published by researchers at the University of Pittsburgh and Carnegie Mellon University. Abstract: "Modern microprocessor performance is limited by local hot spots induced at high frequency by busy integrated circuit elements such as the clock generator. Locally embedded thermoelectric ... » read more

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