tag: CEA-Leti

Foundries Expand Planar Efforts
By Mark LaPedus - 18 Jun, 2015 - Comments: 0

Competition is heating up in the leading-edge foundry business, as vendors begin to ramp up their new 16nm/14nm finFET processes. But that’s not the only action in the foundry arena. They are also expanding their efforts in the leading-edge planar market by rolling out new 28nm and 22nm processes. On one front, TSMC is offering new 28nm variants, based on bulk CMOS technology. And on an... » read more

Manufacturing Bits: June 16
By Mark LaPedus - 16 Jun, 2015 - Comments: 0

Harmonic EUV The U.S. Department of Energy’s Lawrence Berkeley National Laboratory has devised an efficient extreme ultraviolet (EUV) source. The technology could one day be used for a new class of metrology tools, based on angle-resolved photoemission spectroscopy (ARPES). This technique makes use of a photoelectric effect for studying materials. To enable the source, Berkeley Labs devel... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 12 Jun, 2015 - Comments: 0

Christopher Rolland, an analyst at FBR, made a startling statement in a recent report. “At the pace of consolidation set thus far this year, 32% of all U.S. publicly traded semiconductor companies would be acquired in 2015! While this run-rate is not likely sustainable and should slow as the year progresses, we still expect ~15% consolidation rates for the remainder of this cycle (above low-t... » read more

Semiconductor R&D Crisis?
By Mark LaPedus - 11 Jun, 2015 - Comments: 3

Research and development is a sometimes forgotten but critical element in the semiconductor industry. The delicate R&D ecosystem enables many of the key breakthroughs in the business. But there could be a troubling trend, if not a crisis, brewing on two fronts in the R&D arena. On one front, R&D costs for semiconductor technologies are escalating at each node. Higher R&D costs are not only ... » read more

Manufacturing Bits: March 31
By Mark LaPedus - 31 Mar, 2015 - Comments: 0

Shish kebab nano necklaces Using a directed self-assembly (DSA) process, Georgia Institute of Technology has developed a method to make nanometer-scale, chip-based necklaces. The technique could enable organic-inorganic structures, which resemble a tiny shish kebab or a centipede. The structures are made with various materials, such as semiconductors, magnetics, ferroelectrics and others. ... » read more

Manufacturing Bits: March 17
By Mark LaPedus - 17 Mar, 2015 - Comments: 0

EUV source firm seeks help In 2012, a startup called Zplasma came out of stealth mode and introduced its first technology—a next-generation power source for extreme ultraviolet (EUV) lithography. But after much fanfare and hope, Zplasma has been unable to commercialize its EUV source technology. The company has also been unable to attract a development partner or outside funding. And t... » read more

More Lithography Options?
By Mark LaPedus - 03 Mar, 2015 - Comments: 1

Lithographers face some tough decisions at 10nm and beyond. At these nodes, IC makers are still weighing the various patterning options. And to make it even more difficult, lithographers could soon have some new, and potentially disruptive, options on the table. On one front, the traditional next-generation lithography (NGL) technologies are finally making some noticeable progress. For examp... » read more

Manufacturing Bits: March 3
By Mark LaPedus - 03 Mar, 2015 - Comments: 0

Nanoimprint consortium CEA-Leti has launched a nanoimprint lithography program in an effort to propel the technology in the marketplace. The imprint program, dubbed Inspire, will focus on various and emerging non-semiconductor applications, according to Laurent Pain, patterning program manager and business development manager within the Silicon Technologies division at the French R&D or... » read more

Manufacturing Bits: Feb. 24
By Mark LaPedus - 24 Feb, 2015 - Comments: 0

EUV progress report At the SPIE Advanced Lithography conference in San Jose, Calif., ASML Holding said that one customer, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), has exposed more than 1,000 wafers on an NXE:3300B EUV system in a single day. This is one step towards the insertion of EUV lithography in volume production. During a recent test run on the system, TSMC exposed 1,022 w... » read more

Unraveling The Mysteries At IEDM
By Mark LaPedus - 19 Dec, 2014 - Comments: 0

In some respects, the 2014 IEEE International Electron Devices Meeting (IEDM) was no different than past events. The event, held this week in San Francisco, included the usual and dizzying array of tutorials, sessions, papers and panels. On the leading-edge CMOS front, for example, the topics included [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D IC"] chips, III-V materials, [getkc ... » read more

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