Efficient Gated Clock Design Approach for LFSR

A technical paper titled "A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers" was published by researchers at Università degli Studi di Catania, Italy. Abstract "This paper presents an efficient solution to reduce the power consumption of the popular linear feedback shift register by exploiting the gated clock approach. The power reduction with respec... » read more