How Heterogeneous ICs Are Reshaping Design Teams

By Ed Sperling - 31 Mar, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss the complex interactions developing between different engineering groups as designs become more heterogeneous, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Mai... » read more

Design Issues For Chips Over Longer Lifetimes

By Ed Sperling - 08 Mar, 2021 - Comments: 0

Semiconductor Engineering sat down to discuss the myriad challenges associated with chips used in complex systems over longer periods of time them with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Maillet-Contoz, system and architec... » read more

Big Challenges In Verifying Cyber-Physical Systems

By Ed Sperling - 25 Feb, 2021 - Comments: 0

Semiconductor Engineering sat down to discuss cyber-physical systems and how to verify them with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Maillet-Contoz, system and architect specialist at STMicroelectronics. This discussion was... » read more

An Industry Under Siege

By Ed Sperling - 05 Mar, 2020 - Comments: 0

The coronavirus is taking a big toll on the semiconductor industry's unquenchable thirst for new information. The longer it lasts, the more the industry will have to resort to technology — some new, some old — to continue moving forward. Over the past couple weeks, conferences and trade shows have been postponed or outright canceled. Synopsys, Cadence and Intel pulled out of DVCon at the... » read more

How Do Design And Verification Change In The IoT Age?

By Frank Schirrmeister - 24 Mar, 2016 - Comments: 0

Where is the Internet of Things (IoT) on the hype curve? Are expectations too high, or is it really the next big thing? My recent trip to the Design Automation and Test Conference (DATE) in Dresden, Germany, did not give all the answers, but it definitely did shed some light for me on this topic. A very enthusiastic taxi driver took me back 25 years to the Nov. 9, 1989, the time when the Ber... » read more

System Design Enabling The Human Intranet

By Frank Schirrmeister - 26 Mar, 2015 - Comments: 0

Against the always-impressive backdrop of the French Alps, DATE took place earlier this month in Grenoble. DATE has quietly transformed from a European version of DAC into a very interesting technical conference with some very high-caliber attendees. This year, I had the pleasure to participate as session chair for the design tools section, themed “Designing Electronics for the Internet of Th... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer