2025-Product Design Enhancement With Test Structures For Non-Contact Detection Of Yield Detractors


Abstract: Detection and monitoring of the yield loss mechanisms and defects in product chips have been a subject of extensive efforts, resulting in multiple useful Design-for-Manufacturing (DFM) and Design-for-Test (DFT) techniques. Defect inspection techniques extend optical inspection further into sub-10 nm nodes, but many buried defects are formed as a result of multi-layer 3-D interaction... » read more

New Method For BEOL Overlay And Process Margin Characterization


This paper presents a new method, design for inspection (DFI) to characterize overlay. Using design-assisted voltage contrast measurement, the method enables in-line test and monitoring of process induced OVL and CD variation of backend-of line (BEOL) features with litho-etch-lithoetch (LELE) patterning. While only some of the features of multi-color patterning scheme are chosen to be aligned d... » read more

Advanced High Throughput e-Beam Inspection With DirectScan


Optical inspection cannot resolve critical defects at advanced nodes and cannot detect subsurface defects. Especially at 7nm and below, many yield and reliability killer defects are the result of interactions between lithography, etch, and fill. These defects often will have part per billion (PPB) level fail rates. Conventional eBeam tools lack the throughput to measure PPB level fail rates. A ... » read more

Using Better Data To Shorten Test Time


The combination of machine learning plus more sensors embedded into IC manufacturing equipment is creating new possibilities for more targeted testing and faster throughput for fabs and OSATs. The goal is to improve quality and reduce the cost of manufacturing complex chips, where time spent in manufacturing is ballooning at the most advanced nodes. As the number of transistors on a die incr... » read more