Taming Non-Predictable Systems

By Brian Bailey - 28 Jan, 2021 - Comments: 0

How predictable are semiconductor systems? The industry aims to create predictable systems and yet when a carrot is dangled, offering the possibility of faster, cheaper, or some other gain, decision makers invariably decide that some degree of uncertainty is warranted. Understanding uncertainty is at least the first step to making informed decisions, but new tooling is required to assess the im... » read more

Manufacturing Bits: April 23

By Mark LaPedus - 23 Apr, 2019 - Comments: 0

Sorting nuclei CERN and GSI Darmstadt have begun testing the first of two giant magnets that will serve as part of one of the largest and most complex accelerator facilities in the world. CERN, the European Organization for Nuclear Research, recently obtained two magnets from GSI. The two magnets weigh a total of 27 tons. About 60 more magnets will follow over the next five years. These ... » read more

Deep Learning Hardware: FPGA vs. GPU

By Farhad Fallahlalehzari - 20 Dec, 2018 - Comments: 0

FPGAs or GPUs, that is the question. Since the popularity of using machine learning algorithms to extract and process the information from raw data, it has been a race between FPGA and GPU vendors to offer a HW platform that runs computationally intensive machine learning algorithms fast and efficiently. As Deep Learning has driven most of the advanced machine learning applications, it is r... » read more

Machine Learning Shifts More Work to FPGAs, SoCs

By Kevin Fogarty - 24 Sep, 2018 - Comments: 0

A wave of machine-learning-optimized chips is expected to begin shipping in the next few months, but it will take time before data centers decide whether these new accelerators are worth adopting and whether they actually live up to claims of big gains in performance. There are numerous reports that silicon custom-designed for machine learning will deliver 100X the performance of current opt... » read more

High-Performance Memory At Low Cost Per Bit

By Liji Gopalakrishnan - 09 Aug, 2018 - Comments: 0

Hardware developers of deep learning neural networks (DNN) have a universal complaint – they need more and more memory capacity with high performance, low cost and low power. As artificial intelligence (AI) techniques gain wider adoption, their complexity and training requirements also increase. Large and complex DNN models do not fit on the small on-chip SRAM caches near the processor. This ... » read more

Deep Learning Neural Networks Drive Demands On Memory Bandwidth

By Frank Ferro - 10 May, 2018 - Comments: 0

A deep neural network (DNN) is a system that is designed similar to our current understanding of biological neural networks in the brain. DNNs are finding use in many applications, advancing at a fast pace, pushing the limits of existing silicon, and impacting the design of new computing architectures. Figure 1 shows a very basic form of neural network that has several nodes in each layer that ... » read more

Power/Performance Bits: March 27

By Jesse Allen - 27 Mar, 2018 - Comments: 0

Equalizing batteries Engineers at the University of Toledo propose a bilevel equalizer technology to improve the life span of batteries by combining the high performance of an active equalizer with the low cost of a passive equalizer. "Whenever we are talking about batteries, we are talking about cells connected in a series. Over time, the battery is not balanced and limited by the weakest ... » read more

Bridging Machine Learning’s Divide

By Brian Bailey - 08 Feb, 2018 - Comments: 0

There is a growing divide between those researching [getkc id="305" comment="machine learning"] (ML) in the cloud and those trying to perform inferencing using limited resources and power budgets. Researchers are using the most cost-effective hardware available to them, which happens to be GPUs filled with floating point arithmetic units. But this is an untenable solution for embedded infere... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.