Hardware Attack Surface Widening

By Ed Sperling - 06 Feb, 2020 - Comments: 0

An expanding attack surface in hardware, coupled with increasing complexity inside and outside of chips, is making it far more difficult to secure systems against a variety of new and existing types of attacks. Security experts have been warning about the growing threat for some time, but it is being made worse by the need to gather data from more places and to process it with AI/ML/DL. So e... » read more

New Approaches For Hardware Security

By Ed Sperling - 01 Aug, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. (L-R) Norman Chang, Helena Handschuh, Mike Borza. Pho... » read more

Understanding The Importance Of Silicon Security

By Ben Levine - 02 Jul, 2019 - Comments: 0

Vulnerabilities like Meltdown, Spectre and Foreshadow are understandably considered quite serious by the semiconductor industry. This is because they can be exploited by a determined attacker to access sensitive data that should be securely locked down but isn’t. We can think about a cloud-based server running multiple applications that process and store sensitive data. Vulnerabilities lik... » read more

Meltdown, Spectre And Foreshadow

By Ed Sperling - 03 Jun, 2019 - Comments: 0

Ben Levine, senior director of product management for Rambus’ Security Division, talks with Semiconductor Engineering about hardware-specific attacks, why they are so dangerous, and how they work. » read more

New Approaches To Security

By Ed Sperling - 09 Apr, 2019 - Comments: 0

Different approaches are emerging to identify suspicious behavior and shut down potential breaches before they have a chance to do serious damage. This is becoming particularly important in markets where safety is an issue, and in AI and edge devices where the rapid movement of data is essential. These methods are a significant departure from the traditional way of securing devices through l... » read more

Are Devices Getting More Secure?

By Ed Sperling and Kevin Fogarty - 07 Nov, 2018 - Comments: 2

Adding security into chip design is becoming more prevalent as more devices are connected to the Internet, but it's not clear whether that is enough to offset an explosion in connected "things." Security concerns have been growing for the past half-decade, starting with a rash of high-profile attacks on retail establishments, hotel membership clubs, and Equifax, one of the three top credit-c... » read more

Finding Security Holes In Hardware

By Ed Sperling - 06 Sep, 2018 - Comments: 0

At least three major security holes in processors were identified by Google's Project Zero over the past year, with more expected to roll out in coming months. Now the question is what to do about them. Since the beginning of the PC era, two requirements for hardware were backward compatibility and improvements in performance with each new version of processors. No one wants to replace their... » read more

Week In Review: Design, Low Power

By Jesse Allen - 17 Aug, 2018 - Comments: 0

Intel disclosed a speculative execution side-channel attack method called L1 Terminal Fault (L1TF). Leslie Culbertson, Intel's executive vice president and general manager of Product Assurance and Security, writes: "This method affects select microprocessor products supporting Intel Software Guard Extensions (Intel SGX) and was first reported to us by researchers at KU Leuven University, Techni... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Foreshadow