NAND Flash Targets 1,000 Layers
New techniques go beyond improved deposition and etching, but challenges stack up, too.
Testing For Thermal Issues Becomes More Difficult
Chiplets, exotic materials, and heterogeneous integration are impacting test coverage.
Auto Chip Aging Accelerates In Hot Climates
New data shows significant reduction in lifespan and potential new security issues as global temperatures rise.
Is In-Memory Compute Still Alive?
It hasn’t achieved commercial success, but there is still plenty of development happening; analog IMC is getting a second chance.
Baby Steps Toward 3D DRAM
Stacking layers means a complete architecture rethink.
Shift Left Is The Tip Of The Iceberg
A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.
Partitioning In The Chiplet Era
Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.
NAND Flash Targets 1,000 Layers
New techniques go beyond improved deposition and etching, but challenges stack up, too.
AI’s Role In Chip Design Widens, Drawing In New Startups
Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.
What Comes After HBM For Chiplets
The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?
Memory Fundamentals For Engineers
eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.
New AI Processors Architectures Balance Speed With Efficiency
Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.
Defining The Chiplet Socket
The industry may have started with the wrong approach for enabling a third-party chiplet ecosystem, but who will step in and fix it?
