Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 22 Apr, 2022 - Comments: 0

Automotive, mobility Synopsys uncorked its new neural processor IP, which can be used to develop scalable neural processors in automotive and consumer products. The ARC NPX6 NPU IP can run at 3,500 TOPS (30 TOPS per watt), running up to 96K MACs with enhanced utilization, new sparsity features and new interconnect for scalability. The ARC NPX6FS NPU IP and MetaWare MX Toolkit for Safety can be... » read more

Artificial Intelligence For Sustainable And Energy Efficient Buildings

By Fraunhofer IIS/EAS - 11 Nov, 2020 - Comments: 0

According to the goals of Europe’s green deal missions, the continent strives for becoming carbon neutral by 2050. Since buildings are a major contributor to the overall consumption of energy, improving their energy efficiency can be a key to a more sustainable and greener Europe. On the way towards zero-emission buildings, several challenges have to be met: In modern energy systems, several ... » read more

The Evolution Of High-Level Synthesis

By Brian Bailey - 27 Aug, 2020 - Comments: 3

High-level synthesis is getting yet another chance to shine, this time from new markets and new technology nodes. But it's still unclear how fully this technology will be used. Despite gains, it remains unlikely to replace the incumbent RTL design methodology for most of the chip, as originally expected. Seen as the foundational technology for the next generation of EDA companies around the ... » read more

Failure Analysis Becoming Critical To Reliability

By Ed Sperling - 11 Feb, 2020 - Comments: 0

Failure analysis is rapidly becoming a complex, costly and increasingly time-consuming must-do task as demand rises for reliability across a growing range of devices used in markets ranging from automotive to 5G. From the beginning, failure analysis has been about finding out what went wrong in semiconductor design and manufacturing. Different approaches, tools and equipment have improved ov... » read more

From Constraints to Tape-Out: Towards a Continuous AMS Design Flow

By Fraunhofer IIS/EAS - 10 Oct, 2019 - Comments: 0

Author(s): Krinke, Andreas; Horst, Tilman; Gläser, Georg; Grabmann, Martin; Markus, Tobias; Prautsch, Benjamin; Hatnik, Uwe; Lienig, Jens The effort in designing analog/mixed-signal (AMS) integrated circuits is characterized by the largely manual work involved in the design of analog cells and their integration into the overall circuit. This inequality in effort between analog and digital... » read more

Temperature Reduction on a High-Power Thermal Demonstrator

By Fraunhofer IIS/EAS - 10 Oct, 2018 - Comments: 0

High-power applications in microelectronic devices and systems is a crucial and severe issue that may cause elevated thermal and thermomechanical phenomena and finally lead the fabricated system to degradation, limitation of its performance, or even failure and destruction of its features. In specific applications, such as those found in the industry and the automotive sector, the power pro... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.