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Automating Front-End SoC Design With NetSpeed’s On-Chip-Network IP


This white paper from The Linley Group examines the challenges of turning SoC architecture specifications into successful design implementations. It presents the case that SoCs are becoming too large and complex for existing design methodologies and identifies the need for a more automated front-end design process. To read more, click here. » read more

Tear Down The Wall Between Front-End And Back-End Teams


As complexity of system-on-chip devices increases, it's becoming imperative for design teams and organizations to re-examine how they work with one another in order to improve productivity. One giant step in this direction is to bridge the divide between the front-end design process and the physical back-end design process. We often refer to this as a figurative “wall,” but there is real... » read more

Tear Down The Wall Between Front-End And Back-End Teams


Because system-on-chip devices are increasingly complex, it is becoming imperative for design teams and organizations to reexamine how they work with one another in order to innovate new ways to improve productivity in delivering devices to market. The area that could benefit most is the divide that separates the semiconductor front-end design process from the physical back-end design process. ... » read more

From Specification To Chip: A Holistic Design Approach


Chip design is getting more and more challenging in terms of power, performance, area and IP integration. At the same time, competition and time-to-market are forcing much tighter schedules. The traditional ASIC design approach taken by OEMs is to handle the majority of front-end design in-house, and then hand off either register-transfer level (RTL) code or a netlist to an outside vendor, who ... » read more