New AI Processors Architectures Balance Speed With Efficiency

By Ed Sperling - 04 Sep, 2024 - Comments: 1

Leading AI systems designs are migrating away from building the fastest AI processor possible, adopting a more balanced approach that involves highly specialized, heterogeneous compute elements, faster data movement, and significantly lower power. Part of this shift revolves around the adoption of chiplets in 2.5D/3.5D packages, which enable greater customization for different workloads and ... » read more

Chip Industry Week in Review

By The SE Staff - 30 Aug, 2024 - Comments: 1

The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 12 May, 2023 - Comments: 0

Global semiconductor sales reached $574 billion in 2022, and U.S. semiconductor companies accounted for sales totaling $275 billion, or 48% of the global market, according to the 2023 Factbook released by the Semiconductor Industry Association (SIA). DRAM and NAND prices likely will continue to fall further this quarter because production cuts have not kept pace with weakening demand, accord... » read more

Week In Review: Design, Low Power

By Jesse Allen - 12 May, 2023 - Comments: 1

Synopsys acquired Silicon Frontline Technology, a provider of an electrical layout verification solution for mixed-signal and analog designs, large-scale power semiconductor devices, and electrostatic discharge protection networks. "This acquisition enables Synopsys to extend the capabilities of our design analysis portfolio and help build out a system-level electrical analysis platform. We als... » read more

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Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: FuriosaAI

New AI Processors Architectures Balance Speed With Efficiency

Chip Industry Week in Review

Week In Review: Semiconductor Manufacturing, Test

Week In Review: Design, Low Power

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