Week In Review: Design, Low Power

By Jesse Allen - 26 Jul, 2019 - Comments: 0

CEVA acquired the Hillcrest Labs business from InterDigital. Hillcrest Labs supplies software and components for sensor processing in consumer and IoT devices. Hillcrest Labs' MotionEngine sensor processing software already runs on CEVA DSPs (as well as ARM and RISC-V cores) and enables high accuracy 6-axis and 9-axis sensor fusion, dynamic sensor calibration, and application specific features ... » read more

The Week In Review: Design/IoT

By Jesse Allen - 29 Apr, 2016 - Comments: 0

IP & Chips Synopsys debuted MIPI I3CSM controller IP, which incorporates in-band interrupts within the 2-wire interface to deliver low pin count. The IP supports all data rates up to 26.7 Mbps, dynamic address allocation, multi-master operations and 32-bit ARM AMBA Advanced Peripheral Bus slave interface. Marvell unveiled a family of Ethernet transceivers fully optimized for 2.5Gbps a... » read more

The Week In Review: Design

By Ed Sperling - 28 Feb, 2014 - Comments: 0

Tools Cadence rolled out a new verification planning and management tool that is based on SQL, which greatly improves functionality and performance and offers multi-user, multi-engine and multi-analysis capabilities. Database technology—in this case, Structured Query Language—remains one of the very few software platforms that can harness multiple processors effectively. Synopsys unveil... » read more

The Week In Review: Feb. 25

By Ed Sperling - 25 Feb, 2013 - Comments: 0

By Mark LaPedus Is China set to bail out a U.S. government technology darling? Two Chinese automotive companies, Geely and Dongfeng Motor, are reported to have bid between $200 million and $350 million for a majority stake in Fisker, the maker of plug-in hybrid cars. If that happens Fisker—which has $192 million in U.S. federal government loan guarantees—could be headed to China, according... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: GCT Semiconductor

Week In Review: Design, Low Power

The Week In Review: Design/IoT

The Week In Review: Design

The Week In Review: Feb. 25