The Automation Of AI

By Brian Bailey - 28 Mar, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the role that EDA has in automating artificial intelligence and machine learning with Doug Letcher, president and CEO of Metrics; Daniel Hansson, CEO of Verifyter; Harry Foster, chief scientist verification for Mentor, a Siemens Business; Larry Melling, product management director for Cadence; Manish Pandey, Synopsys fellow; and Raik Brinkmann, CEO ... » read more

IoT Creates New IP Requirements

By Ann Mutschler - 13 Mar, 2014 - Comments: 2

With the rise of smart cities, cars and houses, an enhanced connectivity infrastructure bolstered by an increasingly connected culture, the Internet of Things (IoT) represents an exciting opportunity for semiconductor industry players. As such, market researchers at IDC expect the installed base of the Internet of Things will be approximately 212 billion "things" globally by the end of 2020 ... » read more

Bridging The Gap

By Ann Mutschler - 01 Dec, 2011 - Comments: 0

We talk all the time about hardware/software co-design, co-verification, etc., but what is really interesting now is how vital the connection is between power awareness and system-level design. Yes, it sounds obvious, but so far this is an untapped market with ideas still being batted around. As discussed in Parts 1, 2 and 3 of my article series on energy and power, to achieve the best power... » read more

iPhone Has The Power Blues

By Ann Mutschler - 12 Aug, 2010 - Comments: 0

Why do some apps on the iPhone seem to draw more on the battery than others? Is it a matter of power-aware software applications, or is it a hardware issue? Maybe it is a combination of both. I suspect it is due to the intricacies of hardware/software design and verification. I’ve been mulling this over while researching my two articles for this month’s issue of Low-Power Engineering... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: hardware/software codesign

The Automation Of AI

IoT Creates New IP Requirements

Bridging The Gap

iPhone Has The Power Blues