ST’s FD-SOI Tech Available to All Through GF

By Various Writers - 08 Oct, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~ ~ In the spring of 2012, STMicroelectronics announced the company would be manufacturing ST-Ericsson’s next-generation (and very successful) NovaThor ARM-based smartphone/tablet processors using 28nm FD-SOI process technology. With first samples coming out this fall, ASN talks to Jean-Marc Chery, Executive Vice Pres... » read more

Leti Looks at Using Strain with FD-SOI for High-Perf Apps

By Various Writers - 29 Jun, 2012 - Comments: 0

The researchers at Leti working on FD-SOI have extremely deep expertise in it. One of the areas they've looked at is performance boosters. With the interest in FD-SOI rapidly increasing on the heels of the recent ST-GF announcement, their work becomes even more timely. A key Leti team wrote a summary of some recent strain work, which first appeared as part of the Advanced Substra... » read more

What’s ST’s FD-SOI Technology All About?

By Various Writers - 22 Jun, 2012 - Comments: 0

As I blogged here on SemiMD last week, STMicroelectronics has announced that to supplement in-house production at their fab in Crolles, the company has tapped GlobalFoundries for high-volume production of 28nm then 20nm FD-SOI mobile devices. ST will also open access to its FD-SOI technology to GlobalFoundries’ other customers. High-volume manufacturing will kick off with ST-Ericsson’s ... » read more

GloFo to Fab 28/20nm FD-SOI for ST; ST Tech Open to GF Customers

By Various Writers - 15 Jun, 2012 - Comments: 0

Two big pieces of news have recently been announced by STMicroelectronics: to supplement in-house production at Crolles, the company has tapped GlobalFoundries for high-volume production of 28nm then 20nm FD-SOI mobile devices; ST will open access to its FD-SOI technology to GlobalFoundries’ other customers. The high-volume manufacturing will kick off with ST-Ericsson’s ARM-based 2... » read more

Chenming Hu: SOI Can Empower New Transistors to 10nm and beyond

By Various Writers - 30 May, 2012 - Comments: 0

The following is a special guest post by Dr. Chenming Hu, TSMC Distinguished Professor at UC Berkeley. He and his team published seminal papers on FinFETs (1999) and UTB-SOI (2000). This post first appeared as part of the Advanced Substrate News special edition on FD-SOI industrialization. ~~ The good, old MOSFET is nearing its limits. Scaling issues and dopant-induced variations ... » read more

ST-Ericsson 28nm FD-SOI smartphone SOC, Q3 tape-out (interview)

By Various Writers - 24 Apr, 2012 - Comments: 0

ASN recently had a chance to talk to ST-Ericsson’s Chief Chip Architect Louis Tannyeres about the move to 28nm FD-SOI for smartphones and tablet SOCs. Take-away message: FD-SOI solves – with less process complexity – scaling, leakage and variability issues to further shrink CMOS technology beyond 28nm. Here's what he said. ~~ [caption id="attachment_441" align="alignleft" wi... » read more

ST-Ericsson NovaThor This Year, 28nm FDSOI, Soitec Wafers

By Various Writers - 14 Mar, 2012 - Comments: 0

Big and official FD-SOI news: Soitec has announced that the company is supplying the FD-SOI wafers for ST-Ericsson’s next-generation of NovaThor 8540 smartphone/tablet processors. Starting at the 28nm node, this marks the industry’s first industrialization of the new planar, fully-depleted technology on ultra-thin SOI wafers. Soitec has just issued an official press release, but ST-Eri... » read more

32nm SOI is GloFo Fab 8′s 1st Silicon

By Various Writers - 18 Jan, 2012 - Comments: 0

Excellent news for the fast-growing SOI community: the first chips produced at GlobalFoundries’ “Fab 8″ in upstate New York are based on IBM’s latest, 32nm SOI chip technology. In a joint press release, the two companies announced that the chips will be used by customers in networking, gaming and graphics. While the new chips began initial production at IBM’s 300mm fab in East... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: high-perf