Breaking The Copper Bottleneck With Molybdenum Hybrid Metallization


Scaling the back end of line (BEOL) in advanced semiconductor logic devices is a major challenge. Metal lines and via filling in BEOL have historically used copper (Cu) as the electrical conductor. But as device dimensions shrink, Cu use has become problematic. The small critical dimensions (CD) of the Cu metal lines and vias in the latest BEOL structures have created an increase in resistance,... » read more

Breaking The 2nm Barrier


Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace. The chip industry is working on several technologies to solve the interconnect bottleneck, but many of those solutions are still in R&D and may not appear for some time — possibly not until 2nm, which is expected t... » read more