Distributed Shared Memory That Enlarges Effective Memory Capacity Through Intelligent Tiered DRAM and Storage Management (IIT)


A new technical paper titled "MegaMmap: Blurring the Boundary Between Memory and Storage for Data-Intensive Workloads" was published by researchers at Illinois Institute of Technology. "In this work, we propose MegaMmap: a software distributed shared memory (DSM) that enlarges effective memory capacity through intelligent tiered DRAM and storage management. MegaMmap provides workload-aware d... » read more

Chip Industry Technical Paper Roundup: Oct. 22


New technical papers recently added to Semiconductor Engineering’s library: [table id=371 /]   More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

GPUs: Bandit Based Framework To Dynamically Reduce Energy Consumption


A new technical paper titled "Online Energy Optimization in GPUs: A Multi-Armed Bandit Approach" was published by researchers at Illinois Institute of Technology, Argonne National Lab and Emory University. Abstract "Energy consumption has become a critical design metric and a limiting factor in the development of future computing architectures, from small wearable devices to large-scale lea... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Ambarella will use Samsung's 5nm process technology for its new CV3-AD685 automotive AI central domain controller, bringing "new levels of AI acceleration, system integration and power efficiency to ADAS and L2+ through L4 autonomous vehicles.” Renesas introduced four technologies for automotive communication gateway SoCs: (1) an architecture that dynamically changes... » read more