Curvilinear Masks Push The Limits Of Inspection And Metrology


Key Takeaways: Curvilinear masks require native data flows across design, mask data prep, writing, inspection, and metrology. Inspection is shifting from finding all defects to identifying which mask variations actually print on wafer. High-NA EUV will intensify inspection challenges, particularly for small printable defects and actinic contrast limits. Experts at the table:... » read more

Mask Technology Faces A New Set Of Challenges


Key Takeaways: Mask inspection and repair remain the critical bottleneck, even as multi-beam writers have reduced mask-writing constraints. Curvilinear masks are becoming viable for critical layers, but qualification, metrology, and inspection standards still lag production needs. Scaling curvilinear requires curvilinear-native data flows, model-based checks, GPU/HPC compute, and les... » read more

Faster Mask Synthesis With GPUs


Design teams face rising pressure to deliver larger chips with higher transistor densities on tighter schedules using advanced node processing. The computing demands of modern applications, especially those making heavy use of AI, are extending pressure beyond design to every step of the development flow, including manufacturing, where photolithography and mask synthesis must keep pace. This po... » read more

Three Ways Curvy ILT Together With PLDC Improves Wafer Uniformity


This is the second blog in a three-part series on pixel-level dose correction (PLDC). The first installment was “Improving Uniformity and Linearity for All Masks” from January 29, 2025. PLDC: A new solution for improving mask and wafer uniformity Improving mask uniformity is the easiest, cheapest way to improve wafer uniformity. Uniformity is a measure of how similarly the exact same feat... » read more

Speeding Up Computational Lithography With The Power And Parallelism Of GPUs


There are so many challenges in producing modern semiconductor devices that it’s amazing for the industry to pull it off at all. From the underlying physics to fabrication processes to the development flow, there is no shortage of tough issues to address. Some of the biggest arise in lithography for deep submicron chips. A recent post outlined the major trends in lithography and summarized a ... » read more

Luminary Panel Sees Multi-Beam Mask Writers And Curvilinear Masks Key To 193i And EUV


Attendance was up and the mood was optimistic at this year’s SPIE Photomask and EUV conference held September 29 through October 3, 2024. The optimism was apparent as well for multi-beam mask writers and curvilinear masks during the eBeam Initiative’s 15th annual reception and meeting held on October 1. In the eBeam Initiative’s annual Luminaries survey, 93% of those surveyed said that pu... » read more

Overview Of The Current State of the Development Of Curvilinear Masks


A technical paper titled "Curvilinear masks overview: manufacturable mask shapes are more reliably manufacturable" was published by researchers at D2S. The paper covers: The rationale for curvilinear masks The application of the curvilinear inverse lithography technology The state of readiness of the curvilinear mask-making infrastructure, including mask rule checking, metrology, ... » read more

Bringing Curvilinear Data To Mask Data Prep


Advanced nodes that have been leveraging curvilinear correction with technologies such as ILT and curvilinear OPC are increasingly requiring the use of curvilinear masks to meet advanced feature size and pitch requirements. However, building curvilinear masks with standard OASIS file formats can come at the cost of large file sizes, increased turnaround time, and reduced quality of results. The... » read more

Single Vs. Multi-Patterning Advancements For EUV


As semiconductor devices become more complex, so do the methods for patterning them. Ever-smaller features at each new node require continuous advancements in photolithography techniques and technologies. While the basic lithography process hasn’t changed since the founding of the industry — exposing light through a reticle onto a prepared silicon wafer — the techniques and technology ... » read more

Make The Impossible Possible: Use Variable-Shaped Beam Mask Writers And Curvilinear Full-Chip Inverse Lithography Technology For 193i Contacts/Vias With Mask-Wafer Co-Optimization


Abstract: "Full-chip curvilinear inverse lithography technology (ILT) requires mask writers to write full reticle curvilinear mask patterns in a reasonable write time. We jointly study and present the benefits of a full-chip, curvilinear, stitchless ILT with mask-wafer co-optimization (MWCO) for variable-shaped beam (VSB) mask writers and validate its benefits on mask and wafer at Micron Tec... » read more

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