Accelerator Architecture For In-Memory Computation of CNN Inferences Using Racetrack Memory


A new technical paper titled "Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems" was published by researchers at National University of Singapore, A*STAR, Chinese Academy of Sciences, and Hong Kong University of Science and Technology. Abstract "Deep neural networks generate and process large volumes of data, posing challe... » read more

All-In-One Analog AI Accelerator With CMO/HfOx ReRAM Integrated Into The BEOL (IBM Research-Europe)


A new technical paper titled "All-in-One Analog AI Hardware: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices" was published by researchers at IBM Research-Europe. Abstract "Analog in-memory computing is an emerging paradigm designed to efficiently accelerate deep neural network workloads. Recent advancements have focused on either inference or training accelera... » read more

PCM-Based IMC Technology: Overview Of Materials, Device Physics, Design and Fabrication (IBM Research-Europe)


A new technical paper titled "Phase-Change Memory for In-Memory Computing" was published by researchers at IBM Research-Europe. "We review the current state of phase-change materials, PCM device physics, and the design and fabrication of PCM-based IMC chips. We also provide an overview of the application landscape and offer insights into future developments," states the paper. Find the te... » read more

Investigation Of Self-Heating Effects on Fe-FinFETs On IMC Applications (TU Munich, IIT, U. Stuttgart)


A new technical paper titled "Investigating Self-Heating Effects in Ferroelectric FinFETs for Reliable In-Memory Computing" was published by researchers at TU Munich, University of Stuttgart and Indian Institute of Technology, Kanpur. Abstract "Ferroelectric (Fe) FET has emerged as a promising candidate for efficient in-memory computing due to its properties, such as non-volatility and lo... » read more

Design Space For The Device-Circuit Codesign Of NVM-Based CIM Accelerators (TSMC)


A new technical paper titled "Assessing Design Space for the Device-Circuit Codesign of Nonvolatile Memory-Based Compute-in-Memory Accelerators" was published by TSMC researchers. Abstract "Unprecedented penetration of artificial intelligence (AI) algorithms has brought about rapid innovations in electronic hardware, including new memory devices. Nonvolatile memory (NVM) devices offer one s... » read more

Power Delivery Challenges in 3D HI CIM Architectures for AI Accelerators (Georgia Tech)


A new technical paper titled "Co-Optimization of Power Delivery Network Design for 3D Heterogeneous Integration of RRAM-based Compute In-Memory Accelerators" was published by researchers at Georgia Tech. Abstract: "3D heterogeneous integration (3D HI) offers promising solutions for incorporating substantial embedded memory into cutting-edge analog compute-in-memory (CIM) AI accelerators, ad... » read more

Design Space for the Device-Circuit Codesign of NVM-Based CIM Accelerators (TSMC)


A new technical paper/mini-review titled "Assessing Design Space for the Device-Circuit Codesign of Nonvolatile Memory-Based Compute-in-Memory Accelerators" was published by researchers at TSMC and National Tsing Hua University. Abstract "Unprecedented penetration of artificial intelligence (AI) algorithms has brought about rapid innovations in electronic hardware, including new memory devi... » read more

New Approach to Encoding Optical Weights for In-Memory Photonic Computing Using Magneto-Optic Memory Cells


A new technical paper titled "Integrated non-reciprocal magneto-optics with ultra-high endurance for photonic in-memory computing" was published by researchers at UC Santa Barbara, University of Cagliari, University of Pittsburgh, AIST and Tokyo Institute of Technology. Abstract "Processing information in the optical domain promises advantages in both speed and energy efficiency over existi... » read more

Mixed Signal In-Memory Computing With Massively Parallel Gradient Calculations of High-Degree Polynomials


A new technical paper titled "Computing high-degree polynomial gradients in memory" was published by researchers at UCSB, HP Labs, Forschungszentrum Juelich GmbH, and RWTH Aachen University. Abstract "Specialized function gradient computing hardware could greatly improve the performance of state-of-the-art optimization algorithms. Prior work on such hardware, performed in the context of Isi... » read more

Energy-Efficient DRAM↔PIM Transfers for PIM Systems (KAIST)


A new technical paper titled "PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems" was published by researchers at KAIST. Abstract "Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the... » read more

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