tag: in-memory computing

PDN Challenges In DRAM-Based Compute-In-Memory Systems (UT Austin)
By Technical Paper Link - 11 Apr, 2026 - Comments: 0

A new technical paper, "A comparative study on power delivery aspects of compute-in/near-memory approaches using DRAM," was published by researchers at UT Austin. Abstract "Compute-in-memory (PIM) mitigates the memory wall by performing computation within memory, reducing data movement and improving energy efficiency. DRAM-based PIM is particularly attractive due to its high density, matu... » read more

IMC: Free-Space Optical Neural Network With High Clockrate (Berkeley, USC, TU Berlin)
By Technical Paper Link - 12 Feb, 2026 - Comments: 0

A new technical paper titled "High-clockrate free-space optical in-memory computing" was published by researchers at UC Berkeley, USC,  and TU Berlin. Abstract "The ability to process and act on data in real time is increasingly critical for applications ranging from autonomous vehicles, three-dimensional environmental sensing, and remote robotics. However, the deployment of deep neural ... » read more

AFMTJ Model For In-Memory Computing (University of Arizona)
By Technical Paper Link - 10 Feb, 2026 - Comments: 0

University of Arizona researchers published "Antiferromagnetic Tunnel Junctions (AFMTJs) for In-Memory Computing: Modeling and Case Study." Abstract "Antiferromagnetic Tunnel Junctions (AFMTJs) enable picosecond switching and femtojoule writes through ultrafast sublattice dynamics. We present the first end-to-end AFMTJ simulation framework integrating multi-sublattice Landau-Lifshitz-Gilb... » read more

Comprehensive System-Level Performance Model For p-SRAM-Based IMC (USC, UW-Madison)
By Technical Paper Link - 06 Feb, 2026 - Comments: 0

Researchers at USC and University of Wisconsin-Madison published "System-Level Performance Modeling of Photonic In-Memory Computing." Abstract "Photonic in-memory computing is a high-speed, low-energy alternative to traditional transistor-based digital computing that utilizes high photonic operating frequencies and bandwidths. In this work, we develop a comprehensive system-level performa... » read more

Emerging Synaptic Memory Technologies For Neuromorphic CIM Platforms (Tampere Univ.)
By Technical Paper Link - 21 Nov, 2025 - Comments: 0

A new technical paper titled "Toward Capacitive In-Memory-Computing: A Device to Systems Level Perspective on the Future of Artificial Intelligence Hardware" was published by researchers at Tampere University. Abstract: "The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive... » read more

Silicon Photonic Interconnected Chiplets With Computational Network And IMC For LLM Inference Acceleration (NUS)
By Technical Paper Link - 10 Nov, 2025 - Comments: 0

A new technical paper titled "PICNIC: Silicon Photonic Interconnected Chiplets with Computational Network and In-memory Computing for LLM Inference Acceleration" was published by researchers at the National University of Singapore. Abstract "This paper presents a 3D-stacked chiplets based large language model (LLM) inference accelerator, consisting of non-volatile in-memory-computing proces... » read more

Three-Terminal Memtransistors for Decentralized Edge Applications (Penn State, NIWC)
By Technical Paper Link - 04 Nov, 2025 - Comments: 0

A new technical paper titled "Large-scale crossbar arrays based on three-terminal MoS2 memtransistors" was published by researchers at Penn State University and Naval Information Warfare Center Pacific. Abstract "Memristive crossbar architectures are promising as efficient, low-power inference engines for edge AI applications. However, inputs with minor differences often yield similar outpu... » read more

Analog IMC Attention Mechanism For Fast And Energy-Efficient LLMs (FZJ, RWTH Aachen)
By Technical Paper Link - 15 Sep, 2025 - Comments: 0

A new technical paper titled "Analog in-memory computing attention mechanism for fast and energy-efficient large language models" was published by researchers at Forschungszentrum Jülich and RWTH Aachen. Abstract "Transformer networks, driven by self-attention, are central to large language models. In generative transformers, self-attention uses cache memory to store token projec... » read more

Hardware Technologies And Algorithms for Vector Symbolic Architectures (Purdue Univ., Georgia Tech)
By Technical Paper Link - 26 Aug, 2025 - Comments: 0

A new technical paper titled "Cross-Layer Design of Vector-Symbolic Computing: Bridging Cognition and Brain-Inspired Hardware Acceleration" was published by researchers at Purdue University and Georgia Institute of Technology. Abstract "Vector Symbolic Architectures (VSAs) have been widely deployed in various cognitive applications due to their simple and efficient operations. The widesprea... » read more

Energy-Efficient Signal Detectors For Massive MIMO Using SRAM-Based IMCs (Univ. of Illinois at Urbana–Champaign)
By Technical Paper Link - 15 Aug, 2025 - Comments: 0

A new technical paper titled "Energy-Accuracy Trade-Offs in Massive MIMO Signal Detection Using SRAM-Based In-Memory Computing" was published by researchers at the University of Illinois at Urbana–Champaign. Abstract "This paper investigates the use of SRAM-based in-memory computing (IMC) architectures for designing energy efficient and accurate signal detectors for massive multi-input mu... » read more

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