Performance Of Analog In-Memory Computing On Imaging Problems


A technical paper titled "Accelerating AI Using Next-Generation Hardware: Possibilities and Challenges With Analog In-Memory Computing" was published by researchers at Lund University and Ericsson Research. Abstract "Future generations of computing systems need to continue increasing processing speed and energy efficiency in order to meet the growing workload requirements under stringent en... » read more

Can Compute-In-Memory Bring New Benefits To Artificial Intelligence Inference?


Compute-in-memory (CIM) is not necessarily an Artificial Intelligence (AI) solution; rather, it is a memory management solution. CIM could bring advantages to AI processing by speeding up the multiplication operation at the heart of AI model execution. However, for that to be successful, an AI processing system would need to be explicitly architected to use CIM. The change would entail a shift ... » read more

Spiking Neural Networks: Hardware & Algorithm Developments


A new technical paper titled "Exploring Neuromorphic Computing Based on Spiking Neural Networks: Algorithms to Hardware" was published by researchers at Purdue University, Pennsylvania State University, and Yale University. Excerpt from Abstract: "In this article, we outline several strides that neuromorphic computing based on spiking neural networks (SNNs) has taken over the recent past, a... » read more

In-Memory Computing: Assessing Multilevel RRAM-Based VMM Operations


A new technical paper titled "Experimental Assessment of Multilevel RRAM-Based Vector-Matrix Multiplication Operations for In-Memory Computing" was published by researchers at IHP (the Leibniz Institute for High Performance Microelectronics). Abstract: "Resistive random access memory (RRAM)-based hardware accelerators are playing an important role in the implementation of in-memory computin... » read more

Fabricating FeFET Devices with Silicon-Doped Hafnium Oxide As A Ferroelectric Layer


A new technical paper titled "Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications" was published by researchers at Fraunhofer IPMS, GlobalFoundries, and TU Bergakademie Freiberg. Abstract (partial) "This article reports an improvement in the performance of the hafnium oxide-based (HfO2) ferroelectric... » read more

Approximate Adders Suitable For In-Memory Computing Using a Memristor Crossbar Array


A new technical paper titled "IMAGIN: Library of IMPLY and MAGIC NOR Based Approximate Adders for In-Memory Computing" was published by researchers at DFKI (German Research Center for Artificial Intelligence) and Indian Institute of Information Technology Guwahati. "We developed a framework to generate approximate adder designs with varying output errors for 8, 12, and 16-bit adders. We imp... » read more

Multi-Bit In-Memory Computing System for HDC using FeFETs, Achieving SW-Equivalent-Accuracies


A new technical paper titled "Achieving software-equivalent accuracy for hyperdimensional computing with ferroelectric-based in-memory computing" by researchers at University of Notre Dame, Fraunhofer Institute for Photonic Microsystems, University of California Irvine, and Technische Universität Dresden. "We present a multi-bit IMC system for HDC using ferroelectric field-effect transistor... » read more

Nonvolatile ECRAM With A Short-Circuit Retention Time Several Orders of Magnitude Higher Than Previously Shown


A new technical paper titled "Nonvolatile Electrochemical Random-Access Memory Under Short Circuit" was published by researchers at University of Michigan and Sandia National Laboratories. Abstract "Electrochemical random-access memory (ECRAM) is a recently developed and highly promising analog resistive memory element for in-memory computing. One longstanding challenge of ECRAM is attainin... » read more

Transistor-Free Compute-In-Memory Architecture


A new technical paper titled "Reconfigurable Compute-In-Memory on Field-Programmable Ferroelectric Diodes" was recently published by researchers at University of Pennsylvania, Sandia National Labs, and Brookhaven National Lab. The compute-in-memory design is different as it is completely transistor-free. “Even when used in a compute-in-memory architecture, transistors compromise the access... » read more

How Memory Design Optimizes System Performance


Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on the memory side. While the underlying technology still looks very familiar, the real shift is in the way those memories are connected to processing elements and various components within a syste... » read more

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