tag: IP

54th DAC Program Finalized
By Michael MacNamara - 11 Apr, 2017 - Comments: 0

A DAC winter meeting held in sunny Mexico isn’t what it’s cracked up to be. (Although we did enjoy the break from this winter storms!) Everybody thinks the Executive Committee members are lounging on the beach enjoying drinks with little umbrellas in them. That couldn’t be further from the truth! In fact, I and 15 other EC members spent most of our February meetings in Puerto Vallar... » read more

Biz Talk: ASICs
By Ed Sperling - 27 Mar, 2017 - Comments: 0

eSilicon CEO [getperson id="11145" comment="Jack Harding"] talks about the future of scaling, advanced packaging, the next big things—automotive, deep learning and virtual reality—and the need for security. [youtube vid=leO8gABABqk]   Related Stories Executive Insight: Jack Harding (Aug 2016) eSilicon’s CEO looks at industry consolidation, competition, China’s impact, an... » read more

Challenges Grow For IP Reuse
By Ann Mutschler - 23 Mar, 2017 - Comments: 3

As chip complexity increases, so does the complexity of IP blocks being developed for those designs. That is making it much more difficult to re-use IP from one design to the next, or even to integrate new IP into an SoC. What is changing is the perception that standard [getkc id="43" kc_name="IP"] works the same in every design. Moreover, well-developed [getkc id="100" kc_name="methodologie... » read more

Carving Up Verification
By Ed Sperling - 23 Mar, 2017 - Comments: 0

Anirudh Devgan, executive vice president and general manager of [getentity id="22032" e_name="Cadence's"] System & Verification Group, sat down with Semiconductor Engineering to discuss the evolution of verification. What follows are excerpts of that conversation. SE: What’s changing in [getkc id="10" kc_name="verification"]? Devgan: Parallelism, greater capacity and multiple engine... » read more

Dealing With Unintended Behavior
By Brian Bailey - 02 Mar, 2017 - Comments: 0

Functional verification was already tough enough, but having to identify behaviors that were never defined or intended opens up the search space beyond what existing tools are capable of handling. However, while you may not be able to eliminate unintended behaviors, a design team is not helpless. There are several steps that can be taken to reduce the likelihood of these problems getting int... » read more

IP Qualification During RTL Synthesis
By Sudhakar Jilla - 23 Feb, 2017 - Comments: 0

By Sudhakar Jilla and Arvind Narayanan The use of IP (intellectual property) as basic building blocks is an established practice for SoC designs. Most IP is developed without chip-level context and very little knowledge about physical design, which can introduce unwanted schedule risk into the design process. Much of the risk of IP development can be mitigated by using new physical synthesis... » read more

IP Qualification with Oasys-RTL
By Mentor, a Siemens Business - 22 Feb, 2017 - Comments: 0

With increasing design sizes and complexities, the use of IP (intellectual property) as basic building blocks for better SoC design is also increasing. This paper presents the challenges faced during IP integration at the SoC level and what can be done to mitigate those risks during IP development. Mentor’s Oasys-RTL RTL floorplanning and physical synthesis tool offers a unique IP qualificati... » read more

Uncovering Unintended Behavior
By Brian Bailey - 03 Feb, 2017 - Comments: 0

Very few companies ever had to worry about security until recently. Over the past couple of years, we have seen increasing evidence that our connected systems are vulnerable. The recent distributed denial of service (DDoS) attack, which made many Internet sites unavailable, has focused attention on Internet of Things (IoT) devices such as digital video recorders and cameras that have Internet a... » read more

IoT Security Ratings Needed
By Ed Sperling - 02 Feb, 2017 - Comments: 0

Concerns about security have been growing alongside adoption of the IoT, and it seems to be making some headway. This is good news, if it continues, because one of the biggest concerns about buying connected devices is that they can provide inroads into personal data. Data security has been a persistent annoyance for several years. Almost anyone who travels or shops at major department store... » read more

2017: Tool And Methodology Shifts
By Brian Bailey - 26 Jan, 2017 - Comments: 0

As the markets for semiconductor products evolve, so do the tools that enable automation, optimization and verification. While tools rarely go away, they do bend like plants toward light. Today, it is no longer the mobile phone industry that is defining the direction, but automotive and the Internet of Things (IoT). Both of these markets have very different requirements and each creates their o... » read more

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