Week In Review: Manufacturing, Test


Chipmakers and OEMs IBM has unveiled what the company says is the world’s first 2nm chip. The device is based on a next-generation transistor architecture called a nanosheet FET. The nanosheet FET is an evolutionary step from finFETs, which is today’s state-of-the-art transistor technology. Targeted for 2024, IBM’s 2nm chip features a novel multi-Vt scheme, a 12nm gate length, and a n... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs Intel wants $9.7 billion in subsidies for use in building a leading-edge fab in Europe, according to a report from Reuters. As reported, in March, Intel re-entered the foundry business, positioning itself against Samsung and TSMC at the leading edge, and against a multitude of foundries working at older nodes. Eighteen members of the European Union recently launched an ... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs Several foundry vendors are building new fabs. The memory vendors, such as Samsung and SK Hynix, are also building new capacity. In another example, Taiwan DRAM supplier Nanya Technology plans to construct a new 300mm fab in the Taishan Nanlin Technology Park in New Taipei City. The plant will produce DRAMs with Nanya’s in-house developed 10nm-class process technologies a... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC has posted strong results and raised its capital spending budget to $30 billion, up from its prior guidance of $25 billion to $28 billion in 2021. “Its outlook indicates broad-based semiconductor demand continues to strengthen amid supply chain tightness,” said Weston Twigg, an analyst at KeyBanc, in a research note. “TSMC posted another quarter of strong demand for leadi... » read more

The Quest For Curvilinear Photomasks


The semiconductor industry is making noticeable progress on the development of advanced curvilinear photomasks, a technology that has broad implications for chip designs at the most advanced nodes and the ability to manufacture those chips faster and cheaper. The question now is when will this technology move beyond its niche-oriented status and ramp up into high-volume manufacturing. For ye... » read more

Applications, Challenges For Using AI In Fabs


Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. Wh... » read more

Week In Review: Manufacturing, Test


Government policy At one point, there was a school of thought that the Biden administration would relax the current tariffs and export controls in regards to China. So far, the Biden administration hasn’t changed any of the previous policies and is doubling down on those efforts. The Department of Commerce’s Bureau of Industry and Security (BIS) this week added seven Chinese supercomput... » read more

AI In Inspection, Metrology, And Test


AI/ML is creeping into multiple processes within the fab and packaging houses, although not necessarily for the purpose it was originally intended. The chip industry is just beginning to learn where AI makes sense and where it doesn't. In general, AI works best as a tool in the hands of someone with deep domain expertise. AI can do certain things well, particularly when it comes to pattern m... » read more

Week In Review: Manufacturing, Test


Government policy President Biden has rolled out a proposal to boost the infrastructure in the U.S. As part of the plan, the president is calling on Congress to invest $50 billion in U.S. semiconductor manufacturing and research. The proposal must pass Congress, which isn’t going to be easy. “The President’s plan would invest ambitiously in U.S. semiconductor workers, manufacturing, and ... » read more

What Goes Wrong In Advanced Packages


Advanced packaging may be the best way forward for massive improvements in performance, lower power, and different form factors, but it adds a whole new set of issues that were much better understood when Moore's Law and the ITRS roadmap created a semi-standardized path forward for the chip industry. Different advanced packaging options — system-in-package, fan-outs, 2.5D, 3D-IC — have a... » read more

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