tag: lab-to-fab

Using Generative AI To Connect Lab To Fab Test
By Ed Sperling - 08 Aug, 2023 - Comments: 0

Executive Insight: Thomas Benjamin, CTO at National Instruments, sat down with Semiconductor Engineering to discuss a new way of looking at test, using data as a starting point and generative AI as a bridge between different capabilities. SE: What are the big changes you're seeing and how is that affecting movement of critical data from the lab to the fab? Benjamin: If you walk into any m... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 09 Jun, 2023 - Comments: 0

The European Union’s Chips Act Commission has approved €8.1 billion ($8.73 billion) in funding for an Important Project of Common European Interest (IPCEI). As part of this IPCEI, 56 companies, including small and medium-sized enterprises (‘SMEs') and start-ups, will undertake 68 projects in research, innovation, and deployment of microelectronics and communication technologies across th... » read more

From Lab To Fab: Increasing Pressure To Fuse IC Processes
By Gregory Haley - 06 Jun, 2023 - Comments: 0

Test, metrology, and inspection are essential for both the lab and the fab, but fusing them together so that data created in one is easily transferred to the other is a massive challenge. The chip industry has been striving to bridge these separate worlds for years, but the economics, speed, and complexity of change require a new approach. The never-ending push toward smaller, better-defined... » read more

4 Issues In Test
By Ed Sperling - 10 Dec, 2018 - Comments: 0

When most design engineers think about test, they envision a large piece of equipment in the fab they probably will never actually see or interact with. But as chips become more complex—driven by an explosion in both quantity and different types of data—test is emerging as one of the big challenges in design and manufacturing. There are four primary segments for test, each with its own s... » read more

The Race To Zero Defects
By Jeff Dorsch - 10 Sep, 2018 - Comments: 1

By Jeff Dorsch and Ed Sperling Testing chips is becoming more difficult, more time-consuming, and much more critical—particularly as these chips end up in cars, industrial automation, and a variety of edge devices. Now the question is how to provide enough test coverage to ensure that chips will work as expected without slowing down the manufacturing process or driving up costs. Balanci... » read more

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