Week In Review: Semiconductor Manufacturing, Test

EU invests $8.7 billion in electronics projects; WSTS expects 10% semi dip this year; CHIPS Act report identifies metrology gaps; ASE FOCoS-Bridge for AI; hitting 1.8 Pbit/s optical data rate; 2D-enabled microchip.


The European Union’s Chips Act Commission has approved €8.1 billion ($8.73 billion) in funding for an Important Project of Common European Interest (IPCEI). As part of this IPCEI, 56 companies, including small and medium-sized enterprises (‘SMEs’) and start-ups, will undertake 68 projects in research, innovation, and deployment of microelectronics and communication technologies across the value chain.

The World Semiconductor Trade Statistics predicts the global semiconductor market will experience a 10.3% drop in 2023, followed by a strong recovery in 2024, with an estimated growth of 11.8%.

Semiconductor industry revenue reports show mixed results. Global semiconductor equipment billings increased 9% year-over-year to US$26.8 billion in the first quarter of 2023, while quarter-over-quarter billing slipped 3%, according to a new report released by SEMI.

Meanwhile, the SIA reports global semiconductor industry sales were $40.0 billion during the month of April 2023, an increase of 0.3% compared to the March 2023 total of $39.8 billion, and 21.6% less than the April 2022 total of $50.9 billion.

The CHIPS Research and Development (R&D) Office has released a new report, “Metrology Gaps in the Semiconductor Ecosystem.” It describes metrology challenges for the semiconductor sector and will serve as guidance for researchers supported with CHIPS R&D Metrology Program resources to develop project plans, including research activities and outcomes, with overarching goals in line with the CHIPS Act.

Arm joined the Linux Foundation’s Open Programmable Infrastructure (OPI) Project, a community driven initiative focused on creating a standards-based open ecosystem for next-generation architectures and frameworks based on DPU/IPU-Like (Data Processing Unit/Infrastructure Processing Unit) technologies.

The newest power semiconductors for electric vehicles are based on SiC and GaN, not just silicon. Screening these devices for defects and testing them at high currents and/or high voltage introduces several new engineering challenges.

Device-aware testing is the latest methodology for improving test quality of memory devices, but it will cost time and money.

It takes a lot of effort to move a metrology tool from the lab to the fab. But as chips become more complex and expensive, the need for targeted, specialized tools increases as well.


GlobalFoundries and STMicroelectronics finalized their agreement on a new €7.5 billion ($8.57 billion) 300mm semiconductor manufacturing facility in Crolles, France. The project includes €2.9 billion ($3.1 billion) in funding from the European Chips Act.

Marquee Semiconductor announced the acquisition of Semikun Technology Services, a design services company based in India.

Element Solutions announced the acquisition of Kuprion, a developer of next-generation nano-copper technology for the semiconductor, circuit board, and electronics assembly markets. It also terminated its distribution agreement with Entegris for electrochemical deposition products.


ASE announced a new configuration in its VIPack family, the ViPack Fan-Out-Chip-on-Subtrate-Bridge (FOCoS-Bridge), which is designed to enable high-density die-die connections, high I/O counts, and high-speed data transmission needed in AI and high performance compute applications. The 70 x 78 mm package incorporates 2 ASICs and 8 High Bandwidth Memory (HBM) devices connected through 8 silicon bridges.

Bruker launched a new timsTOF Ultra mass spectrometer that incorporates a new Captive Spray Ionization (CSI) Ultra ion source with larger capillary and optimized vortex gas flow, a novel fourth-generation TIMS (trapped ion mobility separation) XR cell, and 14bit digitizer. Bruker also released a unique triple-quad (TQ) mass spectrometer, EVOQ DART-TQ+, which features the first fully integrated Direct Analysis in Real Time (DART) ionization source.

TEL has developed an innovative dielectric etch technology capable of producing memory channel holes in advanced 3D NAND devices with a stack of over 400 layers with exceptionally high etch rates (see image below). By etching at cryogenic temperatures, global warming potential is also reduced by up to 84%. Details will be provided in a paper at VLSI Symposium next week.

SK Hynix announced that it has started mass production of its 238-layer 4D NAND Flash memory, and product compatibility tests with a global smartphone provider are underway.


Researchers from Technical University of Denmark (DTU) and Chalmers University of Technology in Gothenburg, Sweden, achieved data transmission of nearly 2 Petabit per second (Pbit/s) using only a single laser and a single optical chip. The light source is a custom-designed optical chip, which can use the light from a single infrared laser to create a rainbow spectrum of many frequencies. Thus, the one frequency (color) of a single laser can be multiplied into hundreds of frequencies (colors) in a single chip.

Photonics researchers at Oregon State University developed an ultra-energy-efficient method to compensate for temperature variations that degrade photonic chips. It typically takes significant energy to keep the temperatures of photonics devices stable. The Researchers demonstrated that it’s possible to reduce the energy needed for temperature control by a factor of more than 1 million using gate voltage.

The world’s first fully integrated and functional 2D-enabled microchip was fabricated by researchers at King Abdullah University of Science and Technology (KAUST). The device uses hexagonal boron nitride (h-BN) on copper foil with conventional wet processing and photolithography to create a functional memresistor that is 6 nanometers thick.

Further reading

See our Manufacturing, Packaging and Materials newsletter for these feature articles:

  • Etch Processes Push Toward Higher Selectivity, Cost Control
  • Challenges Grow for Creating Smaller Bumps for Flip Chips
  • Managing Yield with EUV Lithography and Stochastics

Read our Test, Measurement & Analytics newsletter for these highlights and more:

  • From Lab To Fab: Increasing Pressure To Fuse IC Processes
  • Journey From Cell-Aware To Device-Aware Testing Begins
  • Ramping Up Power Electronics for EVs

Upcoming events in the chip industry:

  • Radio Frequency Integrated Circuits Symposium-RFIC 2023, June 11 – 13 (San Diego, CA)
  • ISCA 2023: International Symposium on Computer Architecture, June 17 – 21 (Orlando, FL)
  • EMLC 2023: European Mask and Lithography Conference, Jun 19 – 21 (Dresden, Germany)
  • Keysight World: Discover Emerging Tech Trends, June 20 – 23 (Various locations)

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