tag: Magillem

Reviving The IPO Route For IP Companies
By Ed Sperling - 01 Nov, 2021 - Comments: 0

K. Charles Janac, chairman and CEO of Arteris IP, sat down with Semiconductor Engineering to talk about the company's recent decision to go public, including the benefits and risks of operating as a public IP company. SE: The rule of thumb used to be $20 million in revenue was needed for an IP company to do an IPO at the turn of the Millennium, and then it increased to $40 million about a de... » read more

An Acquisition To Streamline SoC Integration
By Kurt Shuler - 15 Feb, 2021 - Comments: 0

Late last year Arteris IP closed its acquisition of Magillem assets, bringing together two companies with a single mission: To support integration of systems-on-chip (SoCs) at the interconnect fabric level and the data integration level. The value of joining forces has been appealing for some time. Since the early days of both companies, we’ve been working with mutual customers and integratio... » read more

Good Vs. Bad Acquisitions
By Ed Sperling - 07 Oct, 2020 - Comments: 0

M&A activity is beginning to heat up across the semiconductor industry, fueled by high market caps, low interest rates, and a slew of startups with innovative technology and limited market reach. Some of these deals are gigantic, such as the pending acquisition of Arm by Nvidia, and the proposed purchase of Maxim Integrated by Analog Devices. Others are more modest, such as Arteris IP's ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 02 Oct, 2020 - Comments: 0

Arteris IP will acquire the assets of Magillem Design Services, combining Arteris' NoC interconnect IP with Magillem's chip design and assembly environment. Magillem’s software products will continue to be offered separately from the Arteris interconnect IP offerings and the joined company will continue to execute on Magillem’s existing product and technology roadmaps. Substantially all Mag... » read more

Week in Review: IoT, Auto, Security
By Jeff Dorsch - 29 Jun, 2018 - Comments: 0

Executive Changes Rambus' board of directors named Luc Seraphin, senior vice president and general manager of the company's Memory and Interfaces Division, as interim CEO while it searches for a replacement for Ron Black. The board terminated Black this week, saying the reason for termination did not involve Rambus' financial and business performance. The company also named Mike Noonen as se... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Jun, 2018 - Comments: 0

M&A Siemens acquired Austemper Design Systems, which provides tools for functional safety and safety-critical designs. Founded in 2015, Texas-based Austemper adds state-of-the-art safety analysis, auto-correction and fault simulation technology to address random hardware faults, as well as correct and harden vulnerable areas, subsequently performing fault simulation to ensure the design is... » read more

The Week In Review: Design
By Jesse Allen - 03 Jun, 2016 - Comments: 0

Tools Mentor Graphics uncorked the latest version of its Catapult high-level synthesis platform, adding a formal-based C Property Checker tool to automatically identify and formally prove hard-to-find issues like uninitialized memory, divide by 0, and array bounds errors in the users' HLS C++/SystemC model. IP ARM unveiled the Cortex-A73 and Mali-G71 processors. According to ARM, the g... » read more

Bridging the IP Divide
By Brian Bailey - 18 May, 2016 - Comments: 1

IP reuse enabled greater efficiency in the creation of large, complex SoCs, but even after 20 years there are few tools to bridge the divide between the IP provider and the IP user. The problem is that there is an implicit fuzzy contract describing how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to... » read more

The Week In Review: Design
By Ed Sperling - 24 Oct, 2014 - Comments: 0

IP Cadence rolled out a portfolio of stacked die memory verification IP to support Wide I/O-2, Hybrid Memory Cube, high-bandwidth memory, and DDR4-3DS. Included are direct memory access for read, write, save, preload and comparison of memory contents, assertions, error configurability, and a built-in address manager. ARM rolled out additions to its enterprise-class SoC interconnects for qua... » read more

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