tag: MIPS Technologies

Are Processors Running Out Of Steam?
By Ed Sperling - 24 Feb, 2014 - Comments: 1

Check out any smart phone these days and you’ll find some reference to the number of cores in the device. It’s not the number of cores that makes a difference, though—or even the clock speed at which they run. Performance depends on the underlying design for how they’re utilized, how often that happens, how much memory they share, how much interaction there is between the cores, and the... » read more

Experts At The Table: Latency
By Ed Sperling - 01 Feb, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Experts At The Table: Latency
By Ed Sperling - 25 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Experts At The Table: Latency
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Roundtable: Battery Life Vs. Delay
By Ed Sperling - 16 Jan, 2013 - Comments: 0

Low-Power High-Performance Engineering talks about the challenges of dealing with latency in semiconductor design with Andrew Caples of Mentor Graphics, Chris Rowen of Tensilica, Drew Wingard of Sonics and Larry Hudepohl of MIPS Technologies. [youtube vid=Q_opQ3W9esA] » read more

The Growing Integration Challenge
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ed Sperling As the number of processors and the amount of memory and IP on a chip continues to skyrocket, so does the challenge for integrating all of this stuff on a single die—or even multiple dies in the same package. There are a number of reasons why it’s getting more difficult to make all of these IP blocks work together. First of all, nothing ever stands still in design. As a r... » read more

The Increasing Challenge Of Reducing Latency
By Ed Sperling - 11 Oct, 2012 - Comments: 0

By Ed Sperling When the first mainframe computers were introduced the big challenge was to improve performance by decreasing the latency between spinning reels of tape and the processor—while also increasing the speed at which the processor could crunch ones and zeroes. Fast forward more than six decades and the two issues are now blurred and often confused. Latency is still a drag on per... » read more

The Limits Of Virtualization
By Ed Sperling - 13 Sep, 2012 - Comments: 0

By Ed Sperling The future of virtualization in the corporate data center is firmly established, but questions about the value of virtualization beyond that world remain as fuzzy as the future of many-core systems. While there is no theoretical limit to how many cores can be added into SoCs, there is very little progress in developing applications that can take advantage of all of those core... » read more

The Easy Stuff Is Over
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ed Sperling Doomsayers have been predicting the end of Moore’s Law for the better part of a decade. While it appears that it will still remain viable for some companies—Intel and IBM already are looking into single digits of nanometers and researchers speculating about picometer designs—for most companies the race is over. Progress will still be made in moving SoCs from one node to... » read more

Moore’s Legacy
By Ed Sperling - 08 Aug, 2012 - Comments: 0

Low-Power High-Performance Engineering talks with MIPS' Mark Throndson, product marketing director, and Ranganathan "Suds" Sudhakar, chief architect, about Moore's Law, multicore chips, software, coherency and the insatiable global demand for speed. [youtube vid=VfvfYSkPpcs] » read more

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