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MISing In Signoff


Timing signoff is critical to ensure your design will perform as expected before it is taped out. For many designs, signoff and subsequent ECOs are focused on the performance target and iterating to meet that.  Once the performance goals are met then the attention passes onto hold-time fixing and then, usually, quickly onto tapeout.  However, even after extensive signoff analysis, silicon fai... » read more

MIS Packaging Takes Off


Momentum is building for IC packages based on an emerging technology called molded interconnect substrate (MIS). ASE, Carsem, JCET/STATS ChipPAC, Unisem and others are developing IC packages based on MIS substrate technology, which is ramping up in the analog, power IC and even the cryptocurrency markets. MIS starts with a specialized substrate material for select IC packages. The MIS sub... » read more