Week in Review: Manufacturing, Test

By Karen Heyman - 15 Jul, 2022 - Comments: 0

Fab capacity STMicroelectronics and GlobalFoundries inked a deal to build a new jointly-operated 300mm fab adjacent to ST’s existing 300mm facility in Crolles, France. This facility is targeted to ramp at full capacity by 2026, with up to 620,000 300mm wafer per year production at full build-out (~42% ST and ~58% GF). The new facility will support several technologies, with a special focus... » read more

Week In Review: Design, Low Power

By Jesse Allen - 15 Jul, 2022 - Comments: 0

Tools & IP Cadence will acquire Future Facilities, a provider of electronics cooling analysis and energy performance optimization solutions for data center design and operations using physics-based 3D digital twins. Future Facilities’ product portfolio includes an electronics thermal solution, as well as computational fluid dynamics (CFD) electronics cooling simulation technology that op... » read more

Week In Review: Design, Low Power

By Jesse Allen - 24 Jul, 2020 - Comments: 0

Perforce Software acquired Methodics. Founded in 2006 and based in San Francisco, Methodics' IP lifecycle management and traceability software will join Perforce's larger portfolio of DevOps software that includes version control, Agile planning, and static code analysis. The two companies have had a strategic partnership in place with customers using software from both companies. Terms of the ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Mobile Semiconductor

Week in Review: Manufacturing, Test

Week In Review: Design, Low Power

Week In Review: Design, Low Power